HD64F2612FA20 Renesas Electronics America, HD64F2612FA20 Datasheet - Page 412

IC H8S MCU FLASH 128K 80QFP

HD64F2612FA20

Manufacturer Part Number
HD64F2612FA20
Description
IC H8S MCU FLASH 128K 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2612FA20

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
43
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
80-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2612FA20
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Part Number:
HD64F2612FA20J
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Section 14 Serial Communication Interface (SCI)
14.8.2
Table 14.13 shows the interrupt sources in Smart Card interface mode. The transmit end interrupt
(TEI) request cannot be used in this mode.
Table 14.13 SCI Interrupt Sources
Channel
2
In Smart Card interface mode, as in normal serial communication interface mode, transfer can be
carried out using the DTC. In transmit operations, the TDRE flag is also set to 1 at the same time
as the TEND flag in SSR is set, and a TXI interrupt is generated. If the TXI request is designated
beforehand as a DTC activation source, the DTC will be activated by the TXI request, and
transmit data will be transferred. The TDRE and TEND flags are automatically cleared to 0 when
data is transferred by the DTC. In the event of an error, the SCI retransmits the same data
automatically. During this period, the TEND flag remains cleared to 0 and the DTC is not
activated. Therefore, the SCI and DTC will automatically transmit the specified number of bytes
in the event of an error, including retransmission. However, the ERS flag is not cleared
automatically when an error occurs. Hence, the RIE bit should be set to 1 beforehand so that an
ERI request will be generated in the event of an error, and the ERS flag will be cleared.
When transferring using the DTC, it is essential to set and enable the DTC before carrying out SCI
setting. For details of the DTC setting procedures, refer to section 8, Data Transfer Controller
(DTC).
In receive operations, an RXI interrupt request is generated when the RDRF flag in SSR is set to
1. If the RXI request is designated beforehand as a DTC activation source, the DTC will be
activated by the RXI request, and the receive data will be transferred. The RDRF flag is cleared to
0 automatically when data is transferred by the DTC. If an error occurs, an error flag is set but the
Rev. 7.00 Sep. 11, 2009 Page 376 of 566
REJ09B0211-0700
0
1
Interrupts in Smart Card Interface Mode
Name
ERI_0
RXI_0
TXI_0
ERI_1
RXI_1
TXI_1
ERI_2
RXI_2
TXI_2
Interrupt Source
Receive Error, detection
Receive Data Full
Transmit Data Empty
Receive Error, detection
Receive Data Full
Transmit Data Empty
Receive Error, detection
Receive Data Full
Transmit Data Empty
Interrupt Flag
ORER, PER, ERS
RDRF
TEND
ORER, PER, ERS
RDRF
TEND
ORER, PER, ERS
RDRF
TEND
DTC Activation
Not possible
Possible
Possible
Not possible
Possible
Possible
Not possible
Possible
Possible

Related parts for HD64F2612FA20