HD64F2612FA20 Renesas Electronics America, HD64F2612FA20 Datasheet - Page 279

• Manufacturer Part Number: HD64F2612FA20
• Description: IC H8S MCU FLASH 128K 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2612FA20

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 43
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

10.9.12 Contention between TCNT Write and Overflow/Underflow
If there is an up-count or down-count in the T
overflow/underflow occurs, the TCNT write takes precedence and the TCFV/TCFU flag in TSR is
not set.
Figure 10.53 shows the operation timing when there is contention between TCNT write and
overflow.
10.9.13 Multiplexing of I/O Pins
In this LSI, the TCLKA input pin is multiplexed with the TIOCC0 I/O pin, the TCLKB input pin
with the TIOCD0 I/O pin, the TCLKC input pin with the TIOCB1 I/O pin, and the TCLKD input
pin with the TIOCB2 I/O pin. When an external clock is input, compare match output should not
be performed from a multiplexed pin.
10.9.14 Interrupts in Module Stop Mode
If module stop mode is entered when an interrupt has been requested, it will not be possible to
clear the CPU interrupt source or the DTC activation source. Interrupts should therefore be
disabled before entering module stop mode.
Figure 10.53 Contention between TCNT Write and Overflow
Address
Write signal
TCNT
TCFV flag
φ
H'FFFF
Prohibited
TCNT write cycle
T
TCNT address
2
1
state of a TCNT write cycle, and
T
Rev. 7.00 Sep. 11, 2009 Page 243 of 566
Section 10 16-Bit Timer Pulse Unit (TPU)
2
M
TCNT write data
REJ09B0211-0700