HD64F2612FA20 Renesas Electronics America, HD64F2612FA20 Datasheet - Page 142

• Manufacturer Part Number: HD64F2612FA20
• Description: IC H8S MCU FLASH 128K 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2612FA20

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 43
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 8 Data Transfer Controller (DTC)
8.2.1
MRA is an 8-bit register that selects the DTC operating mode.
Bit
7
6
5
4
3
2
1
0
Legend:
X: Don’t care
Rev. 7.00 Sep. 11, 2009 Page 106 of 566
REJ09B0211-0700
Bit Name
SM1
SM0
DM1
DM0
MD1
MD0
DTS
Sz
DTC Mode Register A (MRA)
Initial Value
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
—
R/W
—
—
—
—
—
—
—
DTC Data Transfer Size
Description
Source Address Mode 1 and 0
These bits specify an SAR operation after a data
transfer.
0X: SAR is fixed
10: SAR is incremented after a transfer
11: SAR is decremented after a transfer
Destination Address Mode 1 and 0
These bits specify a DAR operation after a data
transfer.
0X: DAR is fixed
10: DAR is incremented after a transfer
11: DAR is decremented after a transfer
DTC Mode
These bits specify the DTC transfer mode.
00: Normal mode
01: Repeat mode
10: Block transfer mode
11: Setting prohibited
DTC Transfer Mode Select
Specifies whether the source side or the destination
side is set to be a repeat area or block area, in repeat
mode or block transfer mode.
0: Destination side is repeat area or block area
1: Source side is repeat area or block area
Specifies the size of data to be transferred.
0: Byte-size transfer
1: Word-size transfer
(by +1 when Sz = 0; by +2 when Sz = 1)
(by –1 when Sz = 0; by –2 when Sz = 1)
(by +1 when Sz = 0; by +2 when Sz = 1)
(by –1 when Sz = 0; by –2 when Sz = 1)