HD64F2612FA20 Renesas Electronics America, HD64F2612FA20 Datasheet - Page 409

IC H8S MCU FLASH 128K 80QFP

HD64F2612FA20

Manufacturer Part Number
HD64F2612FA20
Description
IC H8S MCU FLASH 128K 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2612FA20

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
43
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
80-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2612FA20
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Part Number:
HD64F2612FA20J
Manufacturer:
RENESAS/瑞萨
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14.7.8
When the GM bit in SMR is set to 1, the clock output level can be fixed with bits CKE0 and
CKE1 in SCR. At this time, the minimum clock pulse width can be made the specified width.
Figure 14.31 shows the timing for fixing the clock output level. In this example, GM is set to 1,
CKE1 is cleared to 0, and the CKE0 bit is controlled.
CKE0
SCK
Clock Output Control
No
Figure 14.30 Example of Reception Processing Flow
No
Figure 14.31 Timing for Fixing Clock Output Level
Specified pulse width
RDRF flag in SSR to 0
Read RDR and clear
All data received?
Clear RE bit to 0
ORER = 0 and
Start reception
Initialization
RDRF = 1?
PER = 0
Start
Yes
Yes
Yes
Section 14 Serial Communication Interface (SCI)
No
Rev. 7.00 Sep. 11, 2009 Page 373 of 566
Specified pulse width
Error processing
REJ09B0211-0700

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