HD64F2612FA20 Renesas Electronics America, HD64F2612FA20 Datasheet - Page 125

IC H8S MCU FLASH 128K 80QFP

HD64F2612FA20

Manufacturer Part Number
HD64F2612FA20
Description
IC H8S MCU FLASH 128K 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2612FA20

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
43
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
80-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2612FA20
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Part Number:
HD64F2612FA20J
Manufacturer:
RENESAS/瑞萨
Quantity:
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The PC break controller (PBC) provides functions that simplify program debugging. Using these
functions, it is easy to create a self-monitoring debugger, enabling programs to be debugged with
the chip alone, without using an in-circuit emulator. A block diagram of the PC break controller is
shown in figure 6.1.
Note: No PBC is implemented in the H8S/2614 and H8S/2616.
6.1
• Two break channels (A and B)
• 24-bit break address
• Four types of break compare conditions
• Bus master
• The timing of PC break exception handling after the occurrence of a break condition is as
• Module stop mode can be set
⎯ Bit masking possible
⎯ Instruction fetch
⎯ Data read
⎯ Data write
⎯ Data read/write
⎯ Either CPU or CPU/DTC can be selected
follows:
⎯ Immediately before execution of the instruction fetched at the set address (instruction
⎯ Immediately after execution of the instruction that accesses data at the set address (data
fetch)
access)
Features
Section 6 PC Break Controller (PBC)
Rev. 7.00 Sep. 11, 2009 Page 89 of 566
Section 6 PC Break Controller (PBC)
REJ09B0211-0700

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