HD64F2612FA20 Renesas Electronics America, HD64F2612FA20 Datasheet - Page 202

• Manufacturer Part Number: HD64F2612FA20
• Description: IC H8S MCU FLASH 128K 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2612FA20

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 43
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 10 16-Bit Timer Pulse Unit (TPU)
10.3.1
The TCR registers are 8-bit readable/writable registers that control the TCNT operation for each
channel. The TPU has a total of six TCR registers, one for each channel (channels 0 to 5). TCR
register settings should be conducted only when TCNT operation is stopped.
Bit
7
6
5
4
3
2
1
0
Rev. 7.00 Sep. 11, 2009 Page 166 of 566
REJ09B0211-0700
Bit Name
CCLR2
CCLR1
CCLR0
CKEG1
CKEG0
TPSC2
TPSC1
TPSC0
Timer Control Register (TCR)
Initial value
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
rising edge). If phase counting mode is used on
channels 1, 2, 4, and 5, this setting is ignored and the
phase counting mode setting has priority. Internal
clock edge selection is valid when the input clock is
φ/4 or slower. This setting is ignored if the input clock
is φ/1, or when overflow/underflow of another channel
Counter Clear 0 to 2
These bits select the TCNT counter clearing source.
See tables 10.3 and 10.4 for details.
Clock Edge 0 and 1
These bits select the input clock edge. When the
input clock is counted using both edges, the input
clock period is halved (e.g. φ/4 both edges = φ/2
is selected.
00: Count at rising edge
01: Count at falling edge
1X: Count at both edges
Legend: X: Don’t care
Time Prescaler 0 to 2
These bits select the TCNT counter clock. The clock
source can be selected independently for each
channel. See tables10.5 to10.10 for details.