HD64F2612FA20 Renesas Electronics America, HD64F2612FA20 Datasheet - Page 20

• Manufacturer Part Number: HD64F2612FA20
• Description: IC H8S MCU FLASH 128K 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2612FA20

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 43
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 15 Controller Area Network (HCAN) ..................................................383
15.1 Features .............................................................................................................................. 383
15.2 Input/Output Pins ............................................................................................................... 385
15.3 Register Descriptions ......................................................................................................... 385
15.4 Operation............................................................................................................................ 412
15.5 Interrupts ............................................................................................................................ 428
15.6 DTC Interface .................................................................................................................... 429
15.7 CAN Bus Interface............................................................................................................. 430
15.8 Usage Notes ....................................................................................................................... 430
Rev. 7.00 Sep. 11, 2009 Page xviii of xxxiv
REJ09B0211-0700
14.9.7 Notes when Switching from SCK Pin to Port Pin................................................. 381
15.3.1 Master Control Register (MCR) ........................................................................... 386
15.3.2 General Status Register (GSR) ............................................................................. 387
15.3.3 Bit Configuration Register (BCR) ........................................................................ 389
15.3.4 Mailbox Configuration Register (MBCR) ............................................................ 391
15.3.5 Transmit Wait Register (TXPR) ........................................................................... 392
15.3.6 Transmit Wait Cancel Register (TXCR)............................................................... 393
15.3.7 Transmit Acknowledge Register (TXACK) ......................................................... 394
15.3.8 Abort Acknowledge Register (ABACK) .............................................................. 395
15.3.9 Receive Complete Register (RXPR) ..................................................................... 396
15.3.10 Remote Request Register (RFPR)......................................................................... 397
15.3.11 Interrupt Register (IRR) ........................................................................................ 398
15.3.12 Mailbox Interrupt Mask Register (MBIMR)......................................................... 402
15.3.13 Interrupt Mask Register (IMR) ............................................................................. 403
15.3.14 Receive Error Counter (REC) ............................................................................... 404
15.3.15 Transmit Error Counter (TEC).............................................................................. 404
15.3.16 Unread Message Status Register (UMSR) ............................................................ 405
15.3.17 Local Acceptance Filter Masks (LAFML, LAFMH)............................................ 406
15.3.18 Message Control (MC0 to MC15) ........................................................................ 409
15.3.19 Message Data (MD0 to MD15) ............................................................................ 411
15.3.20 HCAN Monitor Register (HCANMON)............................................................... 411
15.4.1 Hardware and Software Resets ............................................................................. 412
15.4.2 Initialization after Hardware Reset ....................................................................... 412
15.4.3 Message Transmission .......................................................................................... 418
15.4.4 Message Reception ............................................................................................... 421
15.4.5 HCAN Sleep Mode ............................................................................................... 424
15.4.6 HCAN Halt Mode ................................................................................................. 427
15.8.1 Module Stop Mode Setting ................................................................................... 430
15.8.2 Reset ..................................................................................................................... 430
15.8.3 HCAN Sleep Mode ............................................................................................... 431
15.8.4 Interrupts............................................................................................................... 431