HD64F2612FA20 Renesas Electronics America, HD64F2612FA20 Datasheet - Page 337

• Manufacturer Part Number: HD64F2612FA20
• Description: IC H8S MCU FLASH 128K 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2612FA20

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 43
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

12.4.9
Pulse output can be triggered by TPU input capture as well as by compare match. If TGRA
functions as an input capture register in the TPU channel selected by PCR, pulse output will be
triggered by the input capture signal.
Figure 12.11 shows the timing of this output.
12.5
12.5.1
PPG operation can be disabled or enabled using the module stop control register. The initial
setting is for PPG operation to be halted. Register access is enabled by clearing module stop mode.
For details, refer to section 20, Power-Down Modes.
12.5.2
Pins PO8 to PO15 are also used for other peripheral functions such as the TPU. When output by
another peripheral function is enabled, the corresponding pins cannot be used for pulse output.
Note, however, that data transfer from NDR bits to PODR bits takes place, regardless of the usage
of the pins.
Pin functions should be changed only under conditions in which the output trigger event will not
occur.
TIOC pin
Input capture
signal
NDR
PODR
PO
φ
Usage Notes
Pulse Output Triggered by Input Capture
Module Stop Mode Setting
Operation of Pulse Output Pins
Figure 12.11 Pulse Output Triggered by Input Capture (Example)
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Section 12 Programmable Pulse Generator (PPG)
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Rev. 7.00 Sep. 11, 2009 Page 301 of 566
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REJ09B0211-0700