HD64F2612FA20 Renesas Electronics America, HD64F2612FA20 Datasheet - Page 314

IC H8S MCU FLASH 128K 80QFP

HD64F2612FA20

Manufacturer Part Number
HD64F2612FA20
Description
IC H8S MCU FLASH 128K 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2612FA20

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
43
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
80-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Price
Part Number:
HD64F2612FA20
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HD64F2612FA20J
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Section 11 Motor Management Timer (MMT)
Bit
1
0
Note:
POE Pin Control Register (POEPC): POEPC is an 8-bit readable/writable register that controls
enabling or disabling of the POE pin.
Bit
7
6
5
4
3 to
0
Rev. 7.00 Sep. 11, 2009 Page 278 of 566
REJ09B0211-0700
Bit Name
POE0M1
POE0M0
Bit Name
POE3E
POE2E
POE1E
POE0E
* Only 0 can be written, for flag clearing.
Initial Value
0
0
Initial Value
0
0
0
0
Undefined
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
POE0 Modes 1 and 0
These bits select the input mode of the POE0 pin.
00: Request accepted at falling edge of POE0 input
01: POE0 input is sampled for low level 16 times
10: POE0 input is sampled for low level 16 times
11: POE0 input is sampled for low level 16 times
Description
POE3 enabled
0: PA3 pin is port I/O pin/SCK2 I/O pin
1: PA3 pin is POE3 input pin of POE
POE2 enabled
0: PA2 pin is port I/O pin/RxD2 input pin
1: PA2 pin is POE2 input pin of POE
POE1 enabled
0: PA1 pin is port I/O pin/TxD output pin
1: PA1 pin is POE1 input pin of POE
POE0 enabled
0: PA0 pin is port I/O pin
1: PA0 pin is POE0 input pin of POE
Reserved
every φ/8 clock, and request is accepted when
all samples are low level
every φ/16 clock, and request is accepted when
all samples are low level
every φ/128 clock, and request is accepted
when all samples are low level

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