HD64F2612FA20 Renesas Electronics America, HD64F2612FA20 Datasheet - Page 422

• Manufacturer Part Number: HD64F2612FA20
• Description: IC H8S MCU FLASH 128K 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2612FA20

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 43
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 15 Controller Area Network (HCAN)
• Local acceptance filter mask L (LAFML)
• Message control (8 bit × 8 registers × 16 sets) (MC0 to MC15)
• Message data (8 bit × 8 registers × 16 sets) (MD0 to MD15)
• HCAN Monitor Register (HCANMON)
15.3.1
The master control register (MCR) is an 8-bit register that controls the HCAN.
Bit
7
6
5
4, 3
2
1
Rev. 7.00 Sep. 11, 2009 Page 386 of 566
REJ09B0211-0700
Bit Name
MCR7
—
MCR5
—
MCR2
MCR1
Master Control Register (MCR)
Initial Value
0
0
0
All 0
0
0
R/W
R/W
R
R/W
R
R/W
R/W
Description
HCAN Sleep Mode Release
When this bit is set to 1, the HCAN automatically
exits HCAN sleep mode on detection of CAN bus
operation.
Reserved
This bit is always read as 0. Only 0 should be written
to this bit.
HCAN Sleep Mode
When this bit is set to 1, the HCAN transits to HCAN
sleep mode. When this bit is cleared to 0, HCAN
sleep mode is released.
Reserved
These bits are always read as 0. Only 0 should be
written to these bits.
Message Transmission Method
0: Transmission order determined by message
1: Transmission order determined by mailbox (buffer)
Halt Request
When this bit is set to 1, the HCAN transits to HCAN
HALT mode. When this bit is cleared to 0, HCAN
HALT mode is released.
identifier priority
number priority (TXPR1 > TXPR15)