HD64F2612FA20 Renesas Electronics America, HD64F2612FA20 Datasheet - Page 322

IC H8S MCU FLASH 128K 80QFP

HD64F2612FA20

Manufacturer Part Number
HD64F2612FA20
Description
IC H8S MCU FLASH 128K 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2612FA20

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
43
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
80-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2612FA20
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Part Number:
HD64F2612FA20J
Manufacturer:
RENESAS/瑞萨
Quantity:
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Section 12 Programmable Pulse Generator (PPG)
12.3.3
NDRH and NDRL are an 8-bit readable/writable register that stores the data for the next pulse
output. The NDR addresses differ depending on whether pulse output groups have the same output
trigger or different output triggers.
NDRH
If pulse output groups 2 and 3 have the same output trigger, all eight bits are mapped to the same
address and can be accessed at one time, as shown below.
Bit
7
6
5
4
3
2
1
0
If pulse output groups 2 and output pulse groups 3 have different output triggers, the upper 4 bits
and the lower 4 bits are mapped to different addresses, as shown below.
Bit
7
6
5
4
3 to
0
Rev. 7.00 Sep. 11, 2009 Page 286 of 566
REJ09B0211-0700
Bit Name
NDR15
NDR14
NDR13
NDR12
NDR11
NDR10
NDR9
NDR8
Bit Name
NDR15
NDR14
NDR13
NDR12
Next Data Registers H, L (NDRH, NDRL)
Initial Value
0
0
0
0
0
0
0
0
Initial Value
0
0
0
0
All 1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Next Data Register 8 to 15
The register contents are transferred to the
corresponding PODRH bits by the output trigger
specified with PCR.
Description
Next Data Register 12 to 15
The register contents are transferred to the
corresponding PODRH bits by the output trigger
specified with PCR.
Reserved
These bits are always read as 1 and cannot be
modified.

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