LPC2458FET180,551 NXP Semiconductors, LPC2458FET180,551 Datasheet - Page 750

• Manufacturer Part Number: LPC2458FET180,551
• Description: IC ARM7 MCU FLASH 512K 180TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2458FET180,551

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 136
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 180-TFBGA
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN, Ethernet, I2C, I2S, IrDA, SPI, SSP, UART, USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, SAB-TFBGA180
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• On-chip Dac: 10 bit, 1 Channel
• Package: 180TFBGA
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 72 MHz
• For Use With: 622-1023 - BOARD SCKT ADAPTER FOR TFBGA180622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4258; 935282454551; LPC2458FET180-S

NXP Semiconductors
UM10237_4
User manual
3.2 How RealMonitor works
In general terms, the RealMonitor operates as a state machine, as shown in
Figure
packets received by the host, or due to asynchronous events on the target. RMTarget
supports the triggering of only one breakpoint, watchpoint, stop, or semihosting SWI at a
time. There is no provision to allow nested events to be saved and restored. So, for
example, if user application has stopped at one breakpoint, and another breakpoint
occurs in an IRQ handler, RealMonitor enters a panic state. No debugging can be
performed after RealMonitor enters this state.
A debugger such as the ARM eXtended Debugger (AXD) or other RealMonitor aware
debugger, that runs on a host computer, can connect to the target to send commands and
receive data. This communication between host and target is illustrated in
The target component of RealMonitor, RMTarget, communicates with the host component,
RMHost, using the Debug Communications Channel (DCC), which is a reliable link whose
data is carried over the JTAG connection.
While user application is running, RMTarget typically uses IRQs generated by the DCC.
This means that if user application also wants to use IRQs, it must pass any
DCC-generated interrupts to RealMonitor.
To allow nonstop debugging, the EmbeddedICE-RT logic in the processor generates a
Prefetch Abort exception when a breakpoint is reached, or a Data Abort exception when a
watchpoint is hit. These exceptions are handled by the RealMonitor exception handlers
that inform the user, by way of the debugger, of the event. This allows user application to
continue running without stopping the processor. RealMonitor considers user application
to consist of two parts:
Fig 150. RealMonitor as a State Machine
•
•
A foreground application running continuously, typically in User, System, or SVC
mode
A background application containing interrupt and exception handlers that are
triggered by certain events in user system, including:
– IRQs or FIQs
– Data and Prefetch aborts caused by user foreground application. This indicates an
35–150. RealMonitor switches between running and stopped states, in response to
error in the application being debugged. In both cases the host is notified and the
user application is stopped.
RUNNING
Rev. 04 — 26 August 2009
SWI abort
undef
stop
go
STOPPED
Chapter 35: LPC24XX RealMonitor
SWI abort
undef
UM10237
© NXP B.V. 2009. All rights reserved.
PANIC
Figure
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