LPC2458FET180,551 NXP Semiconductors, LPC2458FET180,551 Datasheet - Page 365

• Manufacturer Part Number: LPC2458FET180,551
• Description: IC ARM7 MCU FLASH 512K 180TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2458FET180,551

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 136
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 180-TFBGA
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN, Ethernet, I2C, I2S, IrDA, SPI, SSP, UART, USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, SAB-TFBGA180
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• On-chip Dac: 10 bit, 1 Channel
• Package: 180TFBGA
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 72 MHz
• For Use With: 622-1023 - BOARD SCKT ADAPTER FOR TFBGA180622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4258; 935282454551; LPC2458FET180-S

NXP Semiconductors
Table 349. Configure Device Register bit description
UM10237_4
User manual
Bit
0
7:1
Symbol
CONF_DEVICE
-
11.3 Set Mode (Command: 0xF3, Data: write 1 byte)
Table 350. Set Mode Register bit description
[1]
[2]
Bit Symbol
0
1
2
3
4
5
6
7
This bit should be reset to 0 if the DMA is enabled for any of the Interrupt OUT endpoints.
This bit should be reset to 0 if the DMA is enabled for any of the Bulk OUT endpoints.
AP_CLK
INAK_CI
INAK_CO
INAK_II
INAK_IO
INAK_BI
INAK_BO
-
Description
Device is configured. All enabled non-control endpoints will respond. This
bit is cleared by hardware when a bus reset occurs. When set, the
UP_LED signal is driven LOW if the device is not in the suspended state
(SUS=0).
Reserved, user software should not write ones to reserved bits. The value
read from a reserved bit is not defined.
[1]
[2]
Value Description
0
1
0
1
0
1
0
1
0
1
0
1
0
1
-
Rev. 04 — 26 August 2009
Always PLL Clock.
USB_NEED_CLK is functional; the 48 MHz clock can be
stopped when the device enters suspend state.
USB_NEED_CLK is fixed to 1; the 48 MHz clock cannot be
stopped when the device enters suspend state.
Interrupt on NAK for Control IN endpoint.
Only successful transactions generate an interrupt.
Both successful and NAKed IN transactions generate interrupts.
Interrupt on NAK for Control OUT endpoint.
Only successful transactions generate an interrupt.
Both successful and NAKed OUT transactions generate
interrupts.
Interrupt on NAK for Interrupt IN endpoint.
Only successful transactions generate an interrupt.
Both successful and NAKed IN transactions generate interrupts.
Interrupt on NAK for Interrupt OUT endpoints.
Only successful transactions generate an interrupt.
Both successful and NAKed OUT transactions generate
interrupts.
Interrupt on NAK for Bulk IN endpoints.
Only successful transactions generate an interrupt.
Both successful and NAKed IN transactions generate interrupts.
Interrupt on NAK for Bulk OUT endpoints.
Only successful transactions generate an interrupt.
Both successful and NAKed OUT transactions generate
interrupts.
Reserved, user software should not write ones to reserved bits.
The value read from a reserved bit is not defined.
Chapter 13: LPC24XX USB device controller
UM10237
© NXP B.V. 2009. All rights reserved.
Reset value
NA
365 of 792
0
0
0
0
0
0
0
Reset
value
NA