LPC2458FET180,551 NXP Semiconductors, LPC2458FET180,551 Datasheet - Page 31

• Manufacturer Part Number: LPC2458FET180,551
• Description: IC ARM7 MCU FLASH 512K 180TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2458FET180,551

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 136
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 180-TFBGA
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN, Ethernet, I2C, I2S, IrDA, SPI, SSP, UART, USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, SAB-TFBGA180
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• On-chip Dac: 10 bit, 1 Channel
• Package: 180TFBGA
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 72 MHz
• For Use With: 622-1023 - BOARD SCKT ADAPTER FOR TFBGA180622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4258; 935282454551; LPC2458FET180-S

NXP Semiconductors
UM10237_4
User manual
3.2 Reset
Table 27.
Reset has four sources on the LPC2400: the RESET pin, the Watchdog Reset, Power On
Reset (POR) and the Brown Out Detection circuit (BOD). The RESET pin is a Schmitt
trigger input pin. Assertion of chip Reset by any source, once the operating voltage attains
a usable level, starts the Wakeup Timer (see description in
this chapter), causing reset to remain asserted until the external Reset is de-asserted, the
oscillator is running, a fixed number of clocks have passed, and the flash controller has
completed its initialization. The reset logic is shown in
Bit Symbol
0
1
2
3
7:4 -
EXTPOLAR0 0
EXTPOLAR1 0
EXTPOLAR2 0
EXTPOLAR3 0
External Interrupt Polarity register (EXTPOLAR - address 0xE01F C14C) bit
description
Value Description
1
1
1
1
-
Rev. 04 — 26 August 2009
EINT0 is low-active or falling-edge sensitive (depending on
EXTMODE0).
EINT0 is high-active or rising-edge sensitive (depending on
EXTMODE0).
EINT1 is low-active or falling-edge sensitive (depending on
EXTMODE1).
EINT1 is high-active or rising-edge sensitive (depending on
EXTMODE1).
EINT2 is low-active or falling-edge sensitive (depending on
EXTMODE2).
EINT2 is high-active or rising-edge sensitive (depending on
EXTMODE2).
EINT3 is low-active or falling-edge sensitive (depending on
EXTMODE3).
EINT3 is high-active or rising-edge sensitive (depending on
EXTMODE3).
Reserved, user software should not write ones to reserved
bits. The value read from a reserved bit is not defined.
Chapter 3: LPC24XX System control
Figure
Section 4–5 “Wakeup timer”
3–10.
UM10237
© NXP B.V. 2009. All rights reserved.
31 of 792
Reset
value
0
0
0
0
NA
in