LPC2458FET180,551 NXP Semiconductors, LPC2458FET180,551 Datasheet - Page 590

• Manufacturer Part Number: LPC2458FET180,551
• Description: IC ARM7 MCU FLASH 512K 180TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2458FET180,551

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 136
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 180-TFBGA
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN, Ethernet, I2C, I2S, IrDA, SPI, SSP, UART, USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, SAB-TFBGA180
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• On-chip Dac: 10 bit, 1 Channel
• Package: 180TFBGA
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 72 MHz
• For Use With: 622-1023 - BOARD SCKT ADAPTER FOR TFBGA180622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4258; 935282454551; LPC2458FET180-S

NXP Semiconductors
UM10237_4
User manual
Fig 120. Format and States in the Master Transmitter mode
successful
transmission
to a Slave
Receiver
next transfer
started with a
Repeated Start
condition
Not
Acknowledge
received after
the Slave
address
Not
Acknowledge
received after a
Data byte
arbitration lost
in Slave
address or
Data byte
arbitration lost
and
addressed as
Slave
DATA
n
08H
from Master to Slave
from Slave to Master
S
any number of data bytes and their associated Acknowledge bits
this number (contained in I2STA) corresponds to a defined state of the
I
2
C bus
SLA
W
MT
A OR A
Rev. 04 — 26 August 2009
18H
20H
68H 78H B0H
A
A
A
38H
P
other Master
continues
other Master
continues
DATA
states in Slave mode
Chapter 22: LPC24XX I
to corresponding
A OR A
28H
30H
A
A
38H
10H
P
S
P
other Master
continues
SLA
2
C interfaces I
to Master
receive
UM10237
mode,
= MR
entry
© NXP B.V. 2009. All rights reserved.
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