LPC2458FET180,551 NXP Semiconductors, LPC2458FET180,551 Datasheet - Page 350

IC ARM7 MCU FLASH 512K 180TFBGA

LPC2458FET180,551

Manufacturer Part Number
LPC2458FET180,551
Description
IC ARM7 MCU FLASH 512K 180TFBGA
Manufacturer
NXP Semiconductors
Series
LPC2400r
Datasheets

Specifications of LPC2458FET180,551

Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
136
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
98K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
180-TFBGA
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
32 bit
Data Ram Size
98 KB
Interface Type
CAN, Ethernet, I2C, I2S, IrDA, SPI, SSP, UART, USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
136
Number Of Timers
4
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, SAB-TFBGA180
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
On-chip Dac
10 bit, 1 Channel
Package
180TFBGA
Device Core
ARM7TDMI-S
Family Name
LPC2000
Maximum Speed
72 MHz
For Use With
622-1023 - BOARD SCKT ADAPTER FOR TFBGA180622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
568-4258
935282454551
LPC2458FET180-S

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LPC2458FET180,551
Manufacturer:
MICROCHIP
Quantity:
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Part Number:
LPC2458FET180,551
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NXP Semiconductors
UM10237_4
User manual
9.6.1 USB Receive Data register (USBRxData - 0xFFE0 C218)
9.6.2 USB Receive Packet Length register (USBRxPLen - 0xFFE0 C220)
9.6 USB transfer registers
The registers in this group are used for transferring data between endpoint buffers and
RAM in Slave mode operation. See
For an OUT transaction, the CPU reads the endpoint buffer data from this register. Before
reading this register, the RD_EN bit and LOG_ENDPOINT field of the USBCtrl register
should be set appropriately. On reading this register, data from the selected endpoint
buffer is fetched. The data is in little endian format: the first byte received from the USB
bus will be available in the least significant byte of USBRxData. USBRxData is a read only
register.
Table 321. USB Receive Data register (USBRxData - address 0xFFE0 C218) bit description
This register contains the number of bytes remaining in the endpoint buffer for the current
packet being read via the USBRxData register, and a bit indicating whether the packet is
valid or not. Before reading this register, the RD_EN bit and LOG_ENDPOINT field of the
USBCtrl register should be set appropriately. This register is updated on each read of the
USBRxData register. USBRxPLen is a read only register.
Bit
31:0
Fig 46. USB MaxPacketSize register array indexing
Symbol
RX_DATA
The Endpoint Index is set via the USBEpIn register. MPS_EP0 to MPS_EP31 are accessed via the
USBMaxPSize register.
ENDPOINT INDEX
Rev. 04 — 26 August 2009
Description
Data received.
Section 13–13 “Slave mode
Chapter 13: LPC24XX USB device controller
MPS_EP31
MPS_EP0
operation”.
UM10237
© NXP B.V. 2009. All rights reserved.
Reset value
0x0000 0000
350 of 792

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