LPC2458FET180,551 NXP Semiconductors, LPC2458FET180,551 Datasheet - Page 69

• Manufacturer Part Number: LPC2458FET180,551
• Description: IC ARM7 MCU FLASH 512K 180TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2458FET180,551

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 136
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 180-TFBGA
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN, Ethernet, I2C, I2S, IrDA, SPI, SSP, UART, USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, SAB-TFBGA180
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• On-chip Dac: 10 bit, 1 Channel
• Package: 180TFBGA
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 72 MHz
• For Use With: 622-1023 - BOARD SCKT ADAPTER FOR TFBGA180622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4258; 935282454551; LPC2458FET180-S

NXP Semiconductors
3. Introduction
4. Features
5. EMC functional description
UM10237_4
User manual
The LPC2400 External Memory Controller (EMC) is an ARM PrimeCell™ MultiPort
Memory Controller peripheral offering support for asynchronous static memory devices
such as RAM, ROM and Flash, as well as dynamic memories such as Single Data Rate
SDRAM. The EMC is an Advanced Microcontroller Bus Architecture (AMBA) compliant
peripheral.
Note: Synchronous static memory devices (synchronous burst mode) are not supported.
Figure 5–15
3. Pins: Select data, address, and control pins and their modes in PINSEL6/8/9 and
4. Configuration: see
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PINMODE6/8/9 (see
Dynamic memory interface support including Single Data Rate SDRAM.
Asynchronous static memory device support including RAM, ROM, and Flash, with or
without asynchronous page mode.
Low transaction latency.
Read and write buffers to reduce latency and to improve performance.
8 bit, 16 bit, and 32 bit wide static memory support.
16 bit and 32 bit wide chip select SDRAM memory support.
Static memory features include:
– Asynchronous page mode read
– Programmable wait states
– Bus turnaround delay
– Output enable and write enable delays
– Extended wait
Four chip selects for synchronous memory and four chip selects for static memory
devices.
Power-saving modes dynamically control CKE and CLKOUT to SDRAMs.
Dynamic memory self-refresh mode controlled by software.
Controller supports 2 kbit, 4 kbit, and 8 kbit row address synchronous memory parts.
That is typical 512 MB, 256 MB, and 128 MB parts, with 4, 8, 16, or 32 data bits per
device.
Separate reset domains allow the for auto-refresh through a chip reset if desired.
shows a block diagram of the EMC.
Rev. 04 — 26 August 2009
Table 5–68
Section
Chapter 5: LPC24XX External Memory Controller (EMC)
9–5).
to
Table
5–71.
UM10237
© NXP B.V. 2009. All rights reserved.
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