LPC2458FET180,551 NXP Semiconductors, LPC2458FET180,551 Datasheet
LPC2458FET180,551
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LPC2458FET180-S
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LPC2458FET180,551 Summary of contents
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... ISP/IAP, USB 2.0 device/host/OTG, external memory interface Rev. 3 — 5 October 2010 1. General description NXP Semiconductors designed the LPC2458 microcontroller around a 16-bit/32-bit ARM7TDMI-S CPU core with real-time debug interfaces that include both JTAG and embedded trace. The LPC2458 has 512 kB of on-chip high-speed flash memory. This ...
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... NXP Semiconductors 16 kB SRAM for general purpose DMA use also accessible by the USB SRAM data storage powered from the Real-Time Clock (RTC) power domain. Dual Advanced High-performance Bus (AHB) system allows simultaneous Ethernet DMA, USB DMA, and program execution from on-chip flash with no contention. ...
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... NXP Semiconductors Two independent power domains allow fine tuning of power consumption based on needed features. Each peripheral has its own clock divider for further power saving. These dividers help reduce active power Brownout detect with separate thresholds for interrupt and forced reset. ...
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... NXP Semiconductors 5. Block diagram LPC2458 P0, P1, P2, P3, P4 HIGH-SPEED GPIO 136 PINS TOTAL AHB2 ETHERNET MII/RMII MAC WITH DMA EINT3 to EINT0 EXTERNAL INTERRUPTS P0 × CAP0/CAP1/ CAPTURE/COMPARE CAP2/CAP3 TIMER0/TIMER1/ 4 × MAT2, TIMER2/TIMER3 2 × MAT3, 2 × MAT1/MAT0 6 × PWM0, PWM1 PWM0, PWM1 1 × PCAP0, 2 × ...
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... NXP Semiconductors 6. Pinning information 6.1 Pinning Fig 2. Table 3. Pin allocation table Pin Symbol Pin Symbol Row A 1 P3[12]/D12 2 5 P1[1]/ENET_TXD1 6 9 P1[3]/ENET_TXD3/ 10 MCICMD/PWM0[2] 13 P0[9]/I2STX_SDA/ 14 MOSI1/MAT2[3] Row B 1 TDO 2 5 P1[0]/ENET_TXD0 6 9 P4[29]/ 10 MAT2[1]/RXD3 13 P1[5]/ENET_TX_ER/ ...
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... NXP Semiconductors Table 3. Pin allocation table Pin Symbol Pin Symbol 13 P1[7]/ENET_COL/ 14 MCIDAT1/PWM0[5] Row D 1 P0[26]/AD0[3]/ 2 AOUT/RXD3 5 P0[2]/TXD0 6 9 P4[25]/ SSIO Row E 1 P0[24]/AD0[1]/ 2 I2SRX_WS/CAP3[1] 5 DBGEN DD(DCDC)(3V3) 13 P2[3]/PWM1[4]/ 14 DCD1/PIPESTAT2 Row F 1 P3[14]/D14 2 5 P0[23]/AD0[0]/ ...
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... NXP Semiconductors Table 3. Pin allocation table Pin Symbol Pin Symbol P0[18]/DCD1/ 14 MOSI0/MOSI Row K 1 VBAT 2 5 P0[29]/USB_D P4[3]/ P4[26]/BLS0 14 Row L 1 P2[29]/DQMOUT1 2 5 P1[18]/USB_UP_LED1/ 6 PWM1[1]/CAP1[ SSIO SSIO Row M 1 P0[28]/SCL0 2 5 P0[14]/USB_HSTEN2/ 6 USB_CONNECT2/ ...
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... NXP Semiconductors 6.2 Pin description Table 4. Pin description Symbol Ball P0[0] to P0[31] [1] P0[0]/RD1/ M10 TXD3/SDA1 [1] P0[1]/TD1/RXD3/ N11 SCL1 [1] P0[2]/TXD0 D5 [1] P0[3]/RXD0 A3 [1] P0[4]/ A11 I2SRX_CLK/ RD2/CAP2[0] [1] P0[5]/ B11 I2SRX_WS/ TD2/CAP2[1] [1] P0[6]/ D11 I2SRX_SDA/ SSEL1/MAT2[0] [1] P0[7]/ B12 I2STX_CLK/ ...
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... NXP Semiconductors Table 4. Pin description …continued Symbol Ball [1] P0[9]/ A13 I2STX_SDA/ MOSI1/MAT2[3] [1] P0[10]/TXD2/ L10 SDA2/MAT3[0] [1] P0[11]/RXD2/ P12 SCL2/MAT3[1] [2] P0[12]/ J4 USB_PPWR2/ MISO1/AD0[6] [2] P0[13]/ J5 USB_UP_LED2/ MOSI1/AD0[7] [1] P0[14]/ M5 USB_HSTEN2/ USB_CONNECT2/ SSEL1 [1] P0[15]/TXD1/ H13 SCK0/SCK [1] P0[16]/RXD1/ H14 SSEL0/SSEL [1] P0[17]/CTS1/ J12 ...
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... NXP Semiconductors Table 4. Pin description …continued Symbol Ball [1] P0[18]/DCD1/ J13 MOSI0/MOSI [1] P0[19]/DSR1/ J10 MCICLK/SDA1 [1] P0[20]/DTR1/ K14 MCICMD/SCL1 [1] P0[21]/RI1/ K11 MCIPWR/RD1 [1] P0[22]/RTS1/ L14 MCIDAT0/TD1 [2] P0[23]/AD0[0]/ F5 I2SRX_CLK/ CAP3[0] [2] P0[24]/AD0[1]/ E1 I2SRX_WS/ CAP3[1] [2] P0[25]/AD0[2]/ E4 I2SRX_SDA/ TXD3 [2][3] ...
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... NXP Semiconductors Table 4. Pin description …continued Symbol Ball [4] P0[28]/SCL0 M1 [5] P0[29]/USB_D+1 K5 [5] P0[30]/USB_D−1 N4 [5] P0[31]/USB_D+2 N1 P1[0] to P1[31] [1] P1[0]/ B5 ENET_TXD0 [1] P1[1]/ A5 ENET_TXD1 [1] P1[2]/ B7 ENET_TXD2/ MCICLK/ PWM0[1] [1] P1[3]/ A9 ENET_TXD3/ MCICMD/ PWM0[2] [1] P1[4]/ C6 ENET_TX_EN [1] P1[5]/ B13 ENET_TX_ER/ MCIPWR/ PWM0[3] ...
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... NXP Semiconductors Table 4. Pin description …continued Symbol Ball [1] P1[10]/ A7 ENET_RXD1 [1] P1[11]/ A12 ENET_RXD2/ MCIDAT2/ PWM0[6] [1] P1[12]/ A14 ENET_RXD3/ MCIDAT3/ PCAP0[0] [1] P1[13]/ D14 ENET_RX_DV [1] P1[14]/ D8 ENET_RX_ER [1] P1[15]/ A8 ENET_REF_CLK/ ENET_RX_CLK [1] P1[16]/ B8 ENET_MDC [1] P1[17]/ C9 ENET_MDIO [1] P1[18]/ L5 USB_UP_LED1/ PWM1[1]/ CAP1[0] [1] P1[19]/ P5 USB_TX_E1/ USB_PPWR1/ CAP1[1] [1] P1[20]/ ...
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... NXP Semiconductors Table 4. Pin description …continued Symbol Ball [1] P1[22]/ M6 USB_RCV1/ USB_PWRD1/ MAT1[0] [1] P1[23]/ N7 USB_RX_DP1/ PWM1[4]/MISO0 [1] P1[24]/ P7 USB_RX_DM1/ PWM1[5]/MOSI0 [1] P1[25]/ L7 USB_LS1/ USB_HSTEN1/ MAT1[1] [1] P1[26]/ P8 USB_SSPND1/ PWM1[6]/ CAP0[0] [1] P1[27]/ M9 USB_INT1/ USB_OVRCR1/ CAP0[1] [1] P1[28]/ P10 USB_SCL1/ PCAP1[0]/ MAT0[0] [1] P1[29]/ N10 USB_SDA1/ PCAP1[1]/ ...
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... NXP Semiconductors Table 4. Pin description …continued Symbol Ball P2[0] to P2[31] [1] P2[0]/PWM1[1]/ D12 TXD1/ TRACECLK [1] P2[1]/PWM1[2]/ C14 RXD1/ PIPESTAT0 [1] P2[2]/PWM1[3]/ E11 CTS1/ PIPESTAT1 [1] P2[3]/PWM1[4]/ E13 DCD1/ PIPESTAT2 [1] P2[4]/PWM1[5]/ E14 DSR1/ TRACESYNC [1] P2[5]/PWM1[6]/ F12 DTR1/ TRACEPKT0 [1] P2[6]/PCAP1[0]/RI1/ ...
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... NXP Semiconductors Table 4. Pin description …continued Symbol Ball [1] P2[9]/ H11 USB_CONNECT1/ RXD2/ EXTIN0 [6] P2[10]/EINT0 M13 [6] P2[11]/EINT1/ M12 MCIDAT1/ I2STX_CLK [6] P2[12]/EINT2/ N14 MCIDAT2/ I2STX_WS [6] P2[13]/EINT3/ M11 MCIDAT3/ I2STX_SDA [1] P2[16]/CAS P9 [1] P2[17]/RAS P11 [1] P2[18]/ P3 CLKOUT0 [1] P2[19]/ N5 CLKOUT1 ...
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... NXP Semiconductors Table 4. Pin description …continued Symbol Ball [1] P2[28]/ M2 DQMOUT0 [1] P2[29]/ L1 DQMOUT1 P3[0] to P3[31] [1] P3[0]/D0 D6 [1] P3[1]/D1 E6 [1] P3[2]/D2 A2 [1] P3[3]/D3 G5 [1] P3[4]/D4 D3 [1] P3[5]/D5 E3 [1] P3[6]/D6 F4 [1] P3[7]/D7 G3 [1] P3[8]/D8 A6 [1] P3[9]/D9 A4 [1] P3[10]/D10 B3 [1] P3[11]/D11 B2 [1] P3[12]/D12 ...
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... NXP Semiconductors Table 4. Pin description …continued Symbol Ball [1] P3[23]/CAP0[0]/ M4 PCAP1[0] [1] P3[24]/CAP0[1]/ N3 PWM1[1] [1] P3[25]/MAT0[0]/ M3 PWM1[2] [1] P3[26]/MAT0[1]/ K7 PWM1[3] P4[0] to P4[31] [1] P4[0]/A0 L6 [1] P4[1]/A1 M7 [1] P4[2]/A2 M8 [1] P4[3]/A3 K9 [1] P4[4]/A4 P13 [1] P4[5]/A5 H10 [1] P4[6]/A6 K10 [1] P4[7]/A7 K12 [1] P4[8]/A8 J11 [1] P4[9]/A9 ...
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... NXP Semiconductors Table 4. Pin description …continued Symbol Ball [1] P4[12]/A12 F10 [1] P4[13]/A13 B14 [1] P4[14]/A14 E8 [1] P4[15]/A15 C10 [1] P4[16]/A16 N12 [1] P4[17]/A17 N13 [1] P4[18]/A18 P14 [1] P4[19]/A19 M14 [1] P4[24]/OE C8 [1] P4[25]/WE D9 [1] P4[26]/BLS0 K13 [1] P4[27]/BLS1 ...
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... NXP Semiconductors Table 4. Pin description …continued Symbol Ball [1][8] TRST D4 [1][9] TCK D2 [1][8] RTCK C4 RSTOUT H2 [10] RESET J1 [7][11] XTAL1 L2 [7][11] XTAL2 K4 [7][12] RTCX1 J2 [7][12] RTCX2 J3 V H4, P4, SSIO L9, L13, G13, D13, C11, [13 H3, L8, SSCORE [13] A10 [14 SSA V E2, L4, DD(3V3) K8, L11, J14, E12, ...
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... NXP Semiconductors [4] Open-drain 5 V tolerant digital I/O pad, compatible with I functionality. When power is switched off, this pin connected to the I configuration applies to all functions on this pin. [5] Pad provides digital I/O and USB functions designed in accordance with the USB specification, revision 2.0 (Full-speed and Low-speed mode only) ...
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... NXP Semiconductors The ARM7TDMI-S processor is a general purpose 32-bit microprocessor, which offers high performance and very low power consumption. The ARM architecture is based on Reduced Instruction Set Computer (RISC) principles, and the instruction set and related decode mechanism are much simpler than those of microprogrammed complex instruction set computers ...
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... NXP Semiconductors Table 5. Address range General use 0x0000 0000 to 0x3FFF FFFF 0x4000 0000 to 0x7FFF FFFF 0x8000 0000 to 0xBFFF FFFF 0xE000 0000 to 0xEFFF FFFF 0xF000 0000 to 0xFFFF FFFF LPC2458 Product data sheet LPC2458 memory usage and details Address range details and description ...
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... NXP Semiconductors 3.75 GB Fig 3. 7.5 Interrupt controller The ARM processor core has two interrupt inputs called Interrupt Request (IRQ) and Fast Interrupt Request (FIQ). The VIC takes 32 interrupt request inputs which can be programmed as FIQ or vectored IRQ types. The programmable assignment scheme means that priorities of interrupts from the various peripherals can be dynamically assigned and adjusted ...
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... NXP Semiconductors service routine can simply start dealing with that device. But if more than one request is assigned to the FIQ class, the FIQ service routine can read a word from the VIC that identifies which FIQ source(s) is (are) requesting an interrupt. Vectored IRQs, which include all interrupt requests that are not classified as FIQs, have a programmable interrupt priority ...
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... NXP Semiconductors • Static memory features include: – Asynchronous page mode read – Programmable Wait States – Bus turnaround delay – Output enable and write enable delays – Extended wait • Two chip selects for synchronous memory and two chip selects for static memory devices. • ...
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... NXP Semiconductors • One AHB master for transferring data. This interface transfers data when a DMA request goes active. • 32-bit AHB master bus width. • Incrementing or non-incrementing addressing for source and destination. • Programmable DMA burst size. The DMA burst size can be programmed to more efficiently transfer data ...
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... NXP Semiconductors 7.10 Ethernet The Ethernet block contains a full featured 10 Mbit/s or 100 Mbit/s Ethernet MAC designed to provide optimized performance through the use of DMA hardware acceleration. Features include a generous suite of control registers, half or full duplex operation, flow control, control frames, hardware acceleration for transmit retry, receive packet filtering and wake-up on LAN activity ...
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... NXP Semiconductors • Physical interface: – Attachment of external PHY chip through standard MII or RMII interface. – PHY register access is available via the MIIM interface. 7.11 USB interface The Universal Serial Bus (USB 4-wire bus that supports communication between a host and one or more (up to 127) peripherals. The Host Controller allocates the USB bandwidth to attached devices through a token-based protocol ...
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... NXP Semiconductors • Two downstream ports. • Supports per-port power switching. 7.11.3 USB OTG Controller USB OTG is a supplement to the USB 2.0 specification that augments the capability of existing mobile devices and USB peripherals by adding host functionality for connection to USB peripherals. The OTG Controller integrates the Host Controller, device controller, and a master-only ...
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... NXP Semiconductors 7.13 10-bit ADC The LPC2458 contains one ADC single 10-bit successive approximation ADC with eight channels. 7.13.1 Features • 10-bit successive approximation ADC • Input multiplexing among 8 pins • Power-down mode • Measurement range 10-bit conversion time ≥ 2.44 μs • ...
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... NXP Semiconductors • UART3 includes an IrDA mode to support infrared communication. 7.16 SPI serial I/O controller The LPC2458 contains one SPI controller. SPI is a full duplex serial interface designed to handle multiple masters and slaves connected to a given bus. Only a single master and a single slave can communicate on the interface during a given data transfer ...
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... NXP Semiconductors • Conforms to Multimedia Card Specification v2.11. • Conforms to Secure Digital Memory Card Physical Layer Specification, v0.96. • Can be used as a multimedia card bus or a secure digital memory card bus host. The SD/MMC can be connected to several multimedia cards or a single secure digital memory card. • ...
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... NXP Semiconductors 7.20.1 Features • The interface has separate input/output channels each of which can operate in master or slave mode. • Capable of handling 8-bit, 16-bit, and 32-bit word sizes. • Mono and stereo audio data supported. • The sampling frequency can range from 16 kHz to 48 kHz (16, 22.05, 32, 44.1, 48) kHz. • ...
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... NXP Semiconductors 7.22 Pulse width modulator The PWM is based on the standard Timer block and inherits all of its features, although only the PWM function is pinned out on the LPC2458. The Timer is designed to count cycles of the system derived clock and optionally switch pins, generate interrupts or perform other actions when specified timer values occur, based on seven match registers ...
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... NXP Semiconductors • Pulse period and width can be any number of timer counts. This allows complete flexibility in the trade-off between resolution and repetition rate. All PWM outputs will occur at the same repetition rate. • Double edge controlled PWM outputs can be programmed to be either positive going or negative going pulses. • ...
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... NXP Semiconductors The VBAT pin supplies power only to the RTC and the Battery RAM. These two functions require a minimum of power to operate, which can be supplied by an external battery. When the CPU and the rest of chip functions are stopped and power is removed, the RTC can supply an alarm output that can be used by external hardware to restore chip power and resume operation ...
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... NXP Semiconductors PLLCLKIN and CCLK are the same value unless the PLL is active and connected. The clock frequency for each peripheral can be selected individually and is referred to as PCLK. Refer to 7.25.1.3 RTC oscillator The RTC oscillator can be used as the clock source for the RTC and/or the WDT. Also, the RTC oscillator can be used to drive the PLL and the CPU ...
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... NXP Semiconductors 7.25.4 Power control The LPC2458 supports a variety of power control features. There are four special modes of processor power reduction: Idle mode, Sleep mode, Power-down mode, and Deep power-down mode. The CPU clock rate may also be controlled as needed by changing clock sources, reconfiguring PLL values, and/or altering the CPU clock divider value. This allows a trade-off of power versus processing speed based on application requirements ...
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... NXP Semiconductors the meantime, the flash wake-up timer then counts 4 MHz IRC clock cycles to make the 100 μs flash start-up time. When it times out, access to the flash will be allowed. The customers need to reconfigure the PLL and clock dividers accordingly. 7.25.4.4 Deep power-down mode Deep power-down mode is similar to the Power-down mode, but now the on-chip regulator that supplies power to the internal logic is also shut off ...
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... NXP Semiconductors 7.26 System control 7.26.1 Reset Reset has four sources on the LPC2458: the RESET pin, the Watchdog reset, power-on reset, and the BrownOut Detection (BOD) circuit. The RESET pin is a Schmitt trigger input pin. Assertion of chip Reset by any source, once the operating voltage attains a usable ...
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... NXP Semiconductors CAUTION If level three Code Read Protection (CRP3) is selected, no future factory testing can be performed on the device. 7.26.4 AHB The LPC2458 implements two AHB in order to allow the Ethernet block to operate without interference caused by other system activity. The primary AHB, referred to as AHB1, includes the Vectored Interrupt Controller, GPDMA controller, USB interface, and 16 kB SRAM ...
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... NXP Semiconductors DCC is accessed as a coprocessor 14 by the program running on the ARM7TDMI-S core. The DCC allows the JTAG port to be used for sending and receiving data without affecting the normal program flow. The DCC data and control registers are mapped in to addresses in the EmbeddedICE logic ...
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... NXP Semiconductors 8. Limiting values Table 6. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter V supply voltage (3.3 V) DD(3V3) V DC-to-DC converter supply voltage DD(DCDC)(3V3) (3 analog 3.3 V pad supply voltage DDA V input voltage on pin VBAT i(VBAT) V input voltage on pin VREF ...
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... NXP Semiconductors 9. Thermal characteristics The average chip junction temperature, T equation amb • T amb • R th(j-a) • The internal power dissipation is the product of I the I/O pins is often small and many times can be negligible. However it can be significant in some applications. Table 7. Thermal characteristics − ...
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... NXP Semiconductors 10. Static characteristics Table 8. Static characteristics − ° ° +85 C for commercial applications, unless otherwise specified. amb Symbol Parameter V supply voltage (3.3 V) DD(3V3) V DC-to-DC converter DD(DCDC)(3V3) supply voltage (3 analog 3.3 V pad DDA supply voltage V input voltage on pin i(VBAT) VBAT ...
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... NXP Semiconductors Table 8. Static characteristics − ° ° +85 C for commercial applications, unless otherwise specified. amb Symbol Parameter Standard port pins, RESET, RTCK I LOW-level input IL current I HIGH-level input IH current I OFF-state output OZ current I I/O latch-up current latch V input voltage I V output voltage ...
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... NXP Semiconductors Table 8. Static characteristics − ° ° +85 C for commercial applications, unless otherwise specified. amb Symbol Parameter Oscillator pins V input voltage on pin i(XTAL1) XTAL1 V output voltage on pin o(XTAL2) XTAL2 V input voltage on pin i(RTCX1) RTCX1 V output voltage on pin o(RTCX2) RTCX2 USB pins ...
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... NXP Semiconductors 10.1 Power-down mode I DD(IO) (μA) Fig 4. I (μA) Fig 5. LPC2458 Product data sheet −2 −4 −40 − 3 i(VBAT) DD(DCDC)(3V3) amb I/O maximum supply current I 40 BAT 3.3 V i(VBAT 3.0 V i(VBAT −40 − 3 DD(3V3) DD(DCDC)(3V3) RTC battery maximum supply current I mode All information provided in this document is subject to legal disclaimers ...
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... NXP Semiconductors I DD(DCDC)pd(3v3) Fig 6. 10.2 Deep power-down mode I DD(IO) (μA) Fig 7. LPC2458 Product data sheet 800 (μA) 600 400 V = 3.3 V DD(DCDC)(3V3) 200 V = 3.0 V DD(DCDC)(3V3) 0 −40 − ° 3 DD(3V3) i(VBAT) amb Total DC-to-DC converter supply current I in Power-down mode 300 ...
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... NXP Semiconductors I (μA) Fig 8. I DD(DCDC)dpd(3v3) Fig 9. LPC2458 Product data sheet 40 BAT 3.3 V i(VBAT 3.0 V i(VBAT −40 − 3 DD(3V3) DD(DCDC)(3V3) RTC battery maximum supply current I power-down mode 100 (μ 3.3 V DD(DCDC)(3V3 3.0 V DD(DCDC)(3V3 −40 − ° 3 DD(3V3) i(VBAT) ...
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... NXP Semiconductors 10.3 Electrical pin characteristics V Fig 10. Typical HIGH-level output voltage V (mA) Fig 11. Typical LOW-level output current I LPC2458 Product data sheet 3 °C 25 °C 3.2 −40 °C 2.8 2.4 2 Conditions 3.3 V; standard port pins. DD(3V3 0.2 Conditions 3.3 V; standard port pins. ...
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... NXP Semiconductors 11. Dynamic characteristics Table 9. Dynamic characteristics − ° ° +85 C for commercial applications; V amb Symbol Parameter External clock f oscillator frequency osc T clock cycle time cy(clk) t clock HIGH time CHCX t clock LOW time CLCX t clock rise time CLCH t clock fall time ...
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... NXP Semiconductors 11.1 Internal oscillators Table 10. Dynamic characteristic: internal oscillators − ° ° ≤ +85 C; 3.0 V amb Symbol Parameter f internal RC oscillator frequency osc(RC) f RTC input frequency i(RTC) [1] Parameters are valid over operating temperature range unless otherwise specified. Typical ratings are not guaranteed. The values listed are at room temperature (25 °C), nominal supply voltages. ...
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... NXP Semiconductors 11.4 Flash memory Table 13. Dynamic characteristics of flash − ° ° +85 C, unless otherwise specified; V amb ground. Symbol Parameter N endurance endu t retention time ret [1] Number of program/erase cycles. [2] t specified for < 1 ppm. ret LPC2458 Product data sheet = 3 3.6 V; all voltages are measured with respect to ...
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Static external memory interface Table 14. Dynamic characteristics: Static external memory interface − ° ° pF amb DD(DCDC)(3V3) Symbol Parameter Conditions [1] Common to read and write ...
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Table 14. Dynamic characteristics: Static external memory interface − ° ° pF amb DD(DCDC)(3V3) Symbol Parameter Conditions t WE HIGH to data invalid WEHDNV time t BLS HIGH ...
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... NXP Semiconductors 11.6 Dynamic external memory interface Table 15. Dynamic characteristics: Dynamic external memory interface − ° ° pF amb Config Register = 0x0 (RD = 00) Symbol Parameter Common t chip select valid delay time d(SV) t chip select hold time h(S) t row address strobe valid delay time ...
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... NXP Semiconductors 11.7 Timing CS addr data t CSLOEL OE BLS Fig 13. External memory read access CS BLS/WE addr data OE Fig 14. External memory write access LPC2458 Product data sheet t CSLAV OELAV t OELOEH t BLSLAV t CSLAV t WELWEH t CSLWEL t BLSLBLSH t t CSLBLSL WELDV t CSLDV All information provided in this document is subject to legal disclaimers. ...
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... NXP Semiconductors T PERIOD differential data lines Fig 15. Differential data-to-EOP transition skew and EOP width shifting edges SCK MOSI MISO Fig 16. MISO line set-up time in SSP Master mode Fig 17. Signal timing LPC2458 Product data sheet crossover point crossover point differential data to SE0/EOP skew n × ...
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... NXP Semiconductors 12. ADC electrical characteristics Table 16. ADC static characteristics − 2 3 DDA amb Symbol Parameter V analog input voltage IA C analog input capacitance ia E differential linearity error D E integral non-linearity L(adj) E offset error O E gain error G E absolute error T R voltage source interface ...
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... NXP Semiconductors 1023 1022 1021 1020 1019 1018 7 code out offset error E O (1) Example of an actual transfer curve. (2) The ideal transfer curve. (3) Differential linearity error (E (4) Integral non-linearity (E L(adj) (5) Center of a step of the actual transfer curve. Fig 18. ADC characteristics LPC2458 Product data sheet ...
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... NXP Semiconductors AD0[y] Fig 19. Suggested ADC interface - LPC2458 AD0[y] pin LPC2458 Product data sheet LPC2XXX 20 kΩ SAMPLE SSIO, SSCORE All information provided in this document is subject to legal disclaimers. Rev. 3 — 5 October 2010 LPC2458 Single-chip 16-bit/32-bit micro R vsi AD0[y] V EXT 002aad586 © NXP B.V. 2010. All rights reserved. ...
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... NXP Semiconductors 13. DAC electrical characteristics Table 17. DAC electrical characteristics − 3 3 DDA amb Symbol Parameter E differential linearity error D E integral non-linearity L(adj) E offset error O E gain error G C load capacitance L R load resistance L LPC2458 Product data sheet ° ° +85 C unless otherwise specified Conditions All information provided in this document is subject to legal disclaimers ...
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... NXP Semiconductors 14. Application information 14.1 Suggested USB interface solutions LPC24XX Fig 20. LPC2458 USB interface on a self-powered device LPC24XX Fig 21. LPC2458 USB interface on a bus-powered device LPC2458 Product data sheet V DD(3V3) USB_UP_LED USB_CONNECT soft-connect switch R1 1.5 kΩ V BUS Ω USB_D Ω USB_D− ...
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... NXP Semiconductors RSTOUT USB_SCL1 USB_SDA1 USB_INT1 USB_D+1 USB_D−1 USB_UP_LED1 LPC24XX USB_PPWR2 USB_OVRCR2 USB_PWRD2 USB_D+2 USB_D−2 USB_UP_LED2 Fig 22. LPC2458 USB OTG port configuration: USB port 1 OTG dual-role device, USB port 2 host LPC2458 Product data sheet RESET_N ADR/PSW OE_N/INT_N V DD SPEED ...
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... NXP Semiconductors RSTOUT USB_TX_E1 USB_TX_DP1 USB_TX_DM1 USB_RCV1 USB_RX_DP1 USB_RX_DM1 LPC24XX USB_SCL1 USB_SDA1 USB_INT1 USB_UP_LED1 Fig 23. LPC2458 USB OTG port configuration: VP_VM mode LPC2458 Product data sheet V DD RESET_N OE_N/INT_N DAT_VP SE0_VM RCV ISP1302 ADR/PSW SPEED SUSPEND SCL SDA INT_N V DD All information provided in this document is subject to legal disclaimers. ...
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... NXP Semiconductors USB_UP_LED1 USB_D+1 USB_D−1 USB_PWRD1 USB_OVRCR1 USB_PPWR1 LPC24XX USB_UP_LED2 USB_CONNECT2 USB_D+2 USB_D−2 V BUS Fig 24. LPC2458 USB OTG port configuration: USB port 2 device, USB port 1 host LPC2458 Product data sheet Ω 33 Ω 15 kΩ 15 kΩ ENA 5 V LM3526-L ...
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... NXP Semiconductors USB_UP_LED1 USB_D+1 USB_D−1 USB_PWRD1 USB_OVRCR1 USB_PPWR1 LPC24XX USB_PPWR2 USB_OVRCR2 USB_PWRD2 USB_D+2 USB_D−2 USB_UP_LED2 Fig 25. LPC2458 USB OTG port configuration: USB port 1 host, USB port 2 host 14.2 Crystal oscillator XTAL input and component selection The input voltage to the on-chip oscillators is limited to 1 the oscillator is driven by a ...
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... NXP Semiconductors In slave mode the input clock signal should be coupled by means of a capacitor of 100 pF (Figure corresponds to a square wave signal with a signal swing of between 280 mV and 1.4 V. The XTALOUT pin in this configuration can be left unconnected. External components and models used in oscillation mode are shown in ...
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... NXP Semiconductors Table 19. Fundamental oscillation frequency F 15 MHz to 20 MHz 20 MHz to 25 MHz 14.3 RTC 32 kHz oscillator component selection Fig 28. RTC oscillator modes and models: oscillation mode of operation and external The RTC external oscillator circuit is shown in integrated on chip, only a crystal, the capacitances C externally to the microcontroller ...
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... NXP Semiconductors 14.4 XTAL and RTCX Printed Circuit Board (PCB) layout guidelines The crystal should be connected on the PCB as close as possible to the oscillator input and output pins of the chip. Take care that the load capacitors C third overtone crystal usage have a common ground plane. The external components must also be connected to the ground plain ...
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... NXP Semiconductors 14.6 Reset pin configuration Fig 30. Reset pin configuration LPC2458 Product data sheet reset GLITCH FILTER All information provided in this document is subject to legal disclaimers. Rev. 3 — 5 October 2010 LPC2458 Single-chip 16-bit/32-bit micro ESD ESD V SS 002aaf274 © NXP B.V. 2010. All rights reserved. ...
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... NXP Semiconductors 15. Package outline TFBGA180: thin fine-pitch ball grid array package; 180 balls; body 0.8 mm ball A1 index area ball A1 index area DIMENSIONS (mm are the original dimensions) A UNIT max. 0.35 0.85 0.5 mm 1.2 0.25 0.75 0.4 OUTLINE VERSION IEC SOT570-2 Fig 31. Package outline SOT570-2 (TFBGA180) ...
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... NXP Semiconductors 16. Abbreviations Table 21. Acronym ADC AHB AMBA APB BOD CAN DAC DCC DMA EOP ETM GPIO IrDA JTAG MII OHC OHCI OTG PHY PLL PWM RMII SD/MMC SE0 SPI SSI SSP TTL UART USB LPC2458 Product data sheet Acronym list ...
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... NXP Semiconductors 17. Revision history Table 22. Revision history Document ID Release date LPC2458 v.3 20101005 • Modifications: Section 2 “Features and • Section 7.24 “RTC and battery • Section 7.25.3 “Wake-up • Section 7.25.4 “Power • Table 4 “Pin pins. • Table 4 “Pin • Table 4 “Pin • ...
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... NXP Semiconductors Table 22. Revision history …continued Document ID Release date • Added • Added • Added • Moved below • Updated LPC2458 v.2 20081125 • Modifications: Added Table 11 “Dynamic characteristics: Static external memory interface”. • Added Table 12 “Dynamic characteristics: Dynamic external memory interface”. ...
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... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...
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... For sales office addresses, please send an email to: LPC2458 Product data sheet own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ ...
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... NXP Semiconductors 20. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 3 4.1 Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 3 5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 5 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 8 7 Functional description . . . . . . . . . . . . . . . . . . 20 7.1 Architectural overview . . . . . . . . . . . . . . . . . . 20 7.2 On-chip flash programming memory . . . . . . . 21 7.3 On-chip SRAM . . . . . . . . . . . . . . . . . . . . . . . . 21 7 ...
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... NXP Semiconductors 11.5 Static external memory interface . . . . . . . . . . 55 11.6 Dynamic external memory interface . . . . . . . . 57 11.7 Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 12 ADC electrical characteristics . . . . . . . . . . . . 60 13 DAC electrical characteristics . . . . . . . . . . . . 63 14 Application information 14.1 Suggested USB interface solutions . . . . . . . . 64 14.2 Crystal oscillator XTAL input and component selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 14.3 RTC 32 kHz oscillator component selection . . 70 14 ...