LPC2458FET180,551 NXP Semiconductors, LPC2458FET180,551 Datasheet - Page 370

• Manufacturer Part Number: LPC2458FET180,551
• Description: IC ARM7 MCU FLASH 512K 180TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2458FET180,551

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 136
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 180-TFBGA
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN, Ethernet, I2C, I2S, IrDA, SPI, SSP, UART, USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, SAB-TFBGA180
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• On-chip Dac: 10 bit, 1 Channel
• Package: 180TFBGA
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 72 MHz
• For Use With: 622-1023 - BOARD SCKT ADAPTER FOR TFBGA180622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4258; 935282454551; LPC2458FET180-S

NXP Semiconductors
UM10237_4
User manual
11.12 Set Endpoint Status (Command: 0x40 - 0x55, Data: write 1 byte
11.11 Select Endpoint/Clear Interrupt (Command: 0x40 - 0x5F, Data: read 1
Table 354. Select Endpoint Register bit description
byte)
Commands 0x40 to 0x5F are identical to their Select Endpoint equivalents, with the
following differences:
Remark: This command may be invoked by using the USBCmdCode and USBCmdData
registers, or by setting the corresponding bit in USBEpIntClr. For ease of use, using the
USBEpIntClr register is recommended.
(optional))
The Set Endpoint Status command sets status bits 7:5 and 0 of the endpoint. The
Command Code of Set Endpoint Status is equal to the sum of 0x40 and the physical
endpoint number in hex. Not all bits can be set for all types of endpoints.
Table 355. Set Endpoint Status Register bit description
Bit Symbol
6
7
Bit Symbol
0
4:1 -
•
•
•
They clear the bit corresponding to the endpoint in the USBEpIntSt register.
In case of a control OUT endpoint, they clear the STP and PO bits in the
corresponding Select Endpoint Register.
Reading one byte is obligatory.
B_2_FULL
-
ST
Value
0
1
-
Value Description
0
1
-
Rev. 04 — 26 August 2009
Description
Stalled endpoint bit. A Stalled control endpoint is automatically
unstalled when it receives a SETUP token, regardless of the
content of the packet. If the endpoint should stay in its stalled
state, the CPU can stall it again by setting this bit. When a stalled
endpoint is unstalled - either by the Set Endpoint Status
command or by receiving a SETUP token - it is also re-initialized.
This flushes the buffer: in case of an OUT buffer it waits for a
DATA 0 PID; in case of an IN buffer it writes a DATA 0 PID. There
is no change of the interrupt status of the endpoint. When
already unstalled, writing a zero to this bit initializes the endpoint.
When an endpoint is stalled by the Set Endpoint Status
command, it is also re-initialized.
The endpoint is unstalled.
The endpoint is stalled.
Reserved, user software should not write ones to reserved bits.
The value read from a reserved bit is not defined.
The buffer 2 status.
Buffer 2 is empty.
Buffer 2 is full.
Reserved, user software should not write ones to reserved bits.
The value read from a reserved bit is not defined.
Chapter 13: LPC24XX USB device controller
UM10237
© NXP B.V. 2009. All rights reserved.
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Reset
value
0
NA
Reset
value
0
NA