LPC2458FET180,551 NXP Semiconductors, LPC2458FET180,551 Datasheet - Page 730

• Manufacturer Part Number: LPC2458FET180,551
• Description: IC ARM7 MCU FLASH 512K 180TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2458FET180,551

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 136
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 180-TFBGA
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN, Ethernet, I2C, I2S, IrDA, SPI, SSP, UART, USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, SAB-TFBGA180
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• On-chip Dac: 10 bit, 1 Channel
• Package: 180TFBGA
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 72 MHz
• For Use With: 622-1023 - BOARD SCKT ADAPTER FOR TFBGA180622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4258; 935282454551; LPC2458FET180-S

NXP Semiconductors
UM10237_4
User manual
6.2.5 Protection and Access Information
Table 671. Source or destination burst size
Table 32–672
transfer width.
Table 672. Source or destination transfer width
AHB access information is provided to the source and destination peripherals when a
transfer occurs. The transfer information is provided by programming the DMA channel
(the Prot bit of the DMACCxControl Register, and the Lock bit of the
DMACCxConfiguration Register). These bits are programmed by software and
peripherals can use this information if necessary. Three bits of information are provided,
and
Table 673. Protection bits
Bit value of DBSize or SBSize
100
101
110
111
Bit value of DBWidth or SBWidth
000
001
010
011 and 1xxx
DMACC1Control
Bit
28
29
Table 32–673
shows the value of the 3 bit SWidth or DWidth fields and the corresponding
Value Description
0
1
0
1
shows the purpose of the three protection bits.
Chapter 32: LPC24XX General Purpose DMA (GPDMA) controller
Rev. 04 — 26 August 2009
Privileged or User. This bit controls the AHB HPROT[1] signal.
Indicates that the access is in User, or privileged mode:
User mode.
Privileged mode.
Bufferable or not bufferable. This bit indicates that the access
is bufferable. This bit can, for example, be used to indicate to
an AMBA bridge that the read can complete in zero wait states
on the source bus without waiting for it to arbitrate for the
destination bus and for the slave to accept the data. This bit
controls the AHB HPROT[2] signal.
Indicates that the access is bufferable, or not bufferable:
Not bufferable.
Bufferable.
Source or distention burst transfer request size
32
64
128
256
Source or distention burst transfer request size
Byte (8 bit)
Halfword (16 bit)
Word (32 bit)
Reserved
UM10237
© NXP B.V. 2009. All rights reserved.
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Reset
Value
0
0