LPC2458FET180,551 NXP Semiconductors, LPC2458FET180,551 Datasheet - Page 159

IC ARM7 MCU FLASH 512K 180TFBGA

LPC2458FET180,551

Manufacturer Part Number
LPC2458FET180,551
Description
IC ARM7 MCU FLASH 512K 180TFBGA
Manufacturer
NXP Semiconductors
Series
LPC2400r
Datasheets

Specifications of LPC2458FET180,551

Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
136
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
98K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
180-TFBGA
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
32 bit
Data Ram Size
98 KB
Interface Type
CAN, Ethernet, I2C, I2S, IrDA, SPI, SSP, UART, USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
136
Number Of Timers
4
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, SAB-TFBGA180
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
On-chip Dac
10 bit, 1 Channel
Package
180TFBGA
Device Core
ARM7TDMI-S
Family Name
LPC2000
Maximum Speed
72 MHz
For Use With
622-1023 - BOARD SCKT ADAPTER FOR TFBGA180622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
568-4258
935282454551
LPC2458FET180-S

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LPC2458FET180,551
Manufacturer:
MICROCHIP
Quantity:
1 103
Part Number:
LPC2458FET180,551
Manufacturer:
NXP Semiconductors
Quantity:
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NXP Semiconductors
Table 124. LPC2470/78 pin description
UM10237_4
User manual
Symbol
P0[4]/I2SRX_CLK/
LCDVD[0]/RD2/
CAP2[0]
P0[5]/I2SRX_WS/
LCDVD[1]/TD2/
CAP2[1]
P0[6]/I2SRX_SDA/
LCDVD[8]/
SSEL1/MAT2[0]
P0[7]/I2STX_CLK/
LCDVD[9]/SCK1/
MAT2[1]
P0[8]/I2STX_WS/
LCDVD[16]/
MISO1/MAT2[2]
P0[9]/I2STX_SDA/
LCDVD[17]/
MOSI1/MAT2[3]
Pin
168
166
164
162
160
158
[1]
[1]
[1]
[1]
[1]
[1]
Ball
B12
C12
D13
C13
A15
C14
[1]
[1]
[1]
[1]
[1]
[1]
…continued
Type
I/O
I/O
O
I
I
I/O
I/O
O
O
I
I/O
I/O
O
I/O
O
I/O
I/O
O
I/O
O
I/O
I/O
O
I/O
O
I/O
I/O
O
I/O
O
Rev. 04 — 26 August 2009
Description
P0[4] — General purpose digital input/output pin.
I2SRX_CLK — I
by the slave. Corresponds to the signal SCK in the I
specification.
LCDVD[0] — LCD data.
RD2 — CAN2 receiver input.
CAP2[0] — Capture input for Timer 2, channel 0.
P0[5] — General purpose digital input/output pin.
I2SRX_WS — I
received by the slave. Corresponds to the signal WS in the I
specification.
LCDVD[1] — LCD data.
TD2 — CAN2 transmitter output.
CAP2[1] — Capture input for Timer 2, channel 1.
P0[6] — General purpose digital input/output pin.
I2SRX_SDA — I
by the receiver. Corresponds to the signal SD in the I
specification.
LCDVD[8] — LCD data.
SSEL1 — Slave Select for SSP1.
MAT2[0] — Match output for Timer 2, channel 0.
P0[7] — General purpose digital input/output pin.
I2STX_CLK — I
by the slave. Corresponds to the signal SCK in the I
specification.
LCDVD[9] — LCD data.
SCK1 — Serial Clock for SSP1.
MAT2[1] — Match output for Timer 2, channel 1.
P0[8] — General purpose digital input/output pin.
I2STX_WS — I
received by the slave. Corresponds to the signal WS in the I
specification.
LCDVD[16] — LCD data.
MISO1 — Master In Slave Out for SSP1.
MAT2[2] — Match output for Timer 2, channel 2.
P0[9] — General purpose digital input/output pin.
I2STX_SDA — I
by the receiver. Corresponds to the signal SD in the I
specification.
LCDVD[17] — LCD data.
MOSI1 — Master Out Slave In for SSP1.
MAT2[3] — Match output for Timer 2, channel 3.
[15]
[15]
[15]
[15]
[15]
[15]
2
2
2
S Transmit word select. It is driven by the master and
S Receive word select. It is driven by the master and
2
2
2
S transmit clock. It is driven by the master and received
S transmit data. It is driven by the transmitter and read
S Receive clock. It is driven by the master and received
S Receive data. It is driven by the transmitter and read
[15]
[15]
[15]
[15]
[15]
[15]
Chapter 8: LPC24XX Pin configuration
2
2
UM10237
S-bus
S-bus
2
2
© NXP B.V. 2009. All rights reserved.
S-bus
S-bus
2
2
S-bus
S-bus
159 of 792

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