LPC2458FET180,551 NXP Semiconductors, LPC2458FET180,551 Datasheet - Page 237

• Manufacturer Part Number: LPC2458FET180,551
• Description: IC ARM7 MCU FLASH 512K 180TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2458FET180,551

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 136
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 180-TFBGA
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN, Ethernet, I2C, I2S, IrDA, SPI, SSP, UART, USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, SAB-TFBGA180
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• On-chip Dac: 10 bit, 1 Channel
• Package: 180TFBGA
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 72 MHz
• For Use With: 622-1023 - BOARD SCKT ADAPTER FOR TFBGA180622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4258; 935282454551; LPC2458FET180-S

NXP Semiconductors
UM10237_4
User manual
7.3.2 Receive Filter WoL Status Register (RxFilterWoLStatus - 0xFFE0 0204)
7.3.3 Receive Filter WoL Clear Register (RxFilterWoLClear - 0xFFE0 0208)
Table 223. Receive Filter Control register (RxFilterCtrl - address 0xFFE0 0200) bit
The Receive Filter Wake-up on LAN Status register (RxFilterWoLStatus) is a Read Only
register with an address of 0xFFE0 0204.
Table 11–224
Table 224. Receive Filter WoL Status register (RxFilterWoLStatus - address 0xFFE0 0204) bit
The bits in this register record the cause for a WoL. Bits in RxFilterWoLStatus can be
cleared by writing the RxFilterWoLClear register.
The Receive Filter Wake-up on LAN Clear register (RxFilterWoLClear) is a Write Only
register with an address of 0xFFE0 0208.
Table 11–225
Bit
12
13
31:14 -
Bit
0
1
2
3
4
5
6
7
8
31:9 -
Symbol
AcceptUnicastWoL
AcceptBroadcastWoL
AcceptMulticastWoL
AcceptUnicastHashWoL
AcceptMulticastHashWoL When the value is ’1’, a multicast frame that passes the
AcceptPerfectWoL
-
RxFilterWoL
MagicPacketWoL
Symbol
MagicPacketEnWoL
RxFilterEnWoL
description
description
lists the definition of the individual bits in the register.
lists the definition of the individual bits in the register.
Rev. 04 — 26 August 2009
Function
When the value is ’1’, a unicast frames caused WoL.
When the value is ’1’, a broadcast frame caused WoL.
When the value is ’1’, a multicast frame caused WoL.
When the value is ’1’, a unicast frame that passes the
imperfect hash filter caused WoL.
imperfect hash filter caused WoL.
When the value is ’1’, the perfect address matching filter
caused WoL.
Unused
When the value is ’1’, the receive filter caused WoL.
When the value is ’1’, the magic packet filter caused
WoL.
Unused
Function
When set to ’1’, the result of the magic packet filter will
generate a WoL interrupt when there is a match.
When set to ’1’, the result of the perfect address
matching filter and the imperfect hash filter will
generate a WoL interrupt when there is a match.
Unused
Chapter 11: LPC24XX Ethernet
UM10237
© NXP B.V. 2009. All rights reserved.
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Reset
value
0
0
0x0
Reset
value
0
0
0
0
0
0
0x0
0
0
0x0