LPC2458FET180,551 NXP Semiconductors, LPC2458FET180,551 Datasheet - Page 652

IC ARM7 MCU FLASH 512K 180TFBGA

LPC2458FET180,551

Manufacturer Part Number
LPC2458FET180,551
Description
IC ARM7 MCU FLASH 512K 180TFBGA
Manufacturer
NXP Semiconductors
Series
LPC2400r
Datasheets

Specifications of LPC2458FET180,551

Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
136
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
98K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
180-TFBGA
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
32 bit
Data Ram Size
98 KB
Interface Type
CAN, Ethernet, I2C, I2S, IrDA, SPI, SSP, UART, USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
136
Number Of Timers
4
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, SAB-TFBGA180
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
On-chip Dac
10 bit, 1 Channel
Package
180TFBGA
Device Core
ARM7TDMI-S
Family Name
LPC2000
Maximum Speed
72 MHz
For Use With
622-1023 - BOARD SCKT ADAPTER FOR TFBGA180622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
568-4258
935282454551
LPC2458FET180-S

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LPC2458FET180,551
Manufacturer:
MICROCHIP
Quantity:
1 103
Part Number:
LPC2458FET180,551
Manufacturer:
NXP Semiconductors
Quantity:
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NXP Semiconductors
Table 571. Counter Increment Select Mask register (CISS - address 0xE002 4040) bit description
UM10237_4
User manual
Bit Symbol
2:0 SubSecSel
6:3 Unused
6.2.5 Counter Increment Select Mask Register (CISS - 0xE002 4040)
Value Description
000
001
010
011
100
101
110
111
Table 570. Counter Increment Interrupt Register (CIIR - address 0xE002 400C) bit description
The CISS register provides a way to obtain millisecond-range periodic CPU interrupts
from the Real Time Clock. This can allow freeing up one of the general purpose timers, or
support power saving by putting the CPU into a reduced power mode between periodic
interrupts.
Carry out signals from different stages of the Clock Tick Counter are used to generate the
sub-second interrupts. The possibilities range from 16 counts of the CTC (about
488 microseconds), up to 2,048 counts of the CTC (about 62.5 milliseconds). The
available counts and corresponding times are given in
Bit
0
1
2
3
4
5
6
7
SubSecSelSub-Second Select. This field selects a count for the sub-second interrupt as
follows:
An interrupt is generated on every 16 counts of the Clock Tick Counter. At 32.768 kHz,
this generates an interrupt approximately every 488 microseconds.
An interrupt is generated on every 32 counts of the Clock Tick Counter. At 32.768 kHz,
this generates an interrupt approximately every 977 microseconds.
An interrupt is generated on every 64 counts of the Clock Tick Counter. At 32.768 kHz,
this generates an interrupt approximately every 1.95 milliseconds.
An interrupt is generated on every 128 counts of the Clock Tick Counter. At 32.768 kHz,
this generates an interrupt approximately every 3.9 milliseconds.
An interrupt is generated on every 256 counts of the Clock Tick Counter. At 32.768 kHz,
this generates an interrupt approximately every 7.8 milliseconds.
An interrupt is generated on every 512 counts of the Clock Tick Counter. At 32.768 kHz,
this generates an interrupt approximately every 15.6 milliseconds.
An interrupt is generated on every 1024 counts of the Clock Tick Counter. At 32.768 kHz,
this generates an interrupt approximately every 31.25 milliseconds.
An interrupt is generated on every 2048 counts of the Clock Tick Counter. At 32.768 kHz,
this generates an interrupt approximately every 62.5 milliseconds.
Reserved, user software should not write ones to reserved bits. The value read from a
reserved bit is not defined.
Symbol
IMSEC
IMMIN
IMHOUR
IMDOM
IMDOW
IMDOY
IMMON
IMYEAR
Description
When 1, an increment of the Second value generates an interrupt.
When 1, an increment of the Minute value generates an interrupt.
When 1, an increment of the Hour value generates an interrupt.
When 1, an increment of the Day of Month value generates an
interrupt.
When 1, an increment of the Day of Week value generates an interrupt. NA
When 1, an increment of the Day of Year value generates an interrupt. NA
When 1, an increment of the Month value generates an interrupt.
When 1, an increment of the Year value generates an interrupt.
Rev. 04 — 26 August 2009
Chapter 26: LPC24XX Real-Time Clock (RTC) and battery RAM
Table
26–571.
UM10237
© NXP B.V. 2009. All rights reserved.
652 of 792
Reset
value
NC
NA
Reset
value
NA
NA
NA
NA
NA
NA

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