LPC2458FET180,551 NXP Semiconductors, LPC2458FET180,551 Datasheet - Page 598

• Manufacturer Part Number: LPC2458FET180,551
• Description: IC ARM7 MCU FLASH 512K 180TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2458FET180,551

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 136
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 180-TFBGA
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN, Ethernet, I2C, I2S, IrDA, SPI, SSP, UART, USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, SAB-TFBGA180
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• On-chip Dac: 10 bit, 1 Channel
• Package: 180TFBGA
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 72 MHz
• For Use With: 622-1023 - BOARD SCKT ADAPTER FOR TFBGA180622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4258; 935282454551; LPC2458FET180-S

NXP Semiconductors
Table 528. Tad_105: Slave Transmitter mode
UM10237_4
User manual
Status
Code
(I2CSTAT)
0xA8
0xB0
0xB8
0xC0
0xC8
Status of the I
and hardware
Own SLA+R has been
received; ACK has
been returned.
Arbitration lost in
SLA+R/W as master;
Own SLA+R has been
received, ACK has
been returned.
Data byte in I2DAT
has been transmitted;
ACK has been
received.
Data byte in I2DAT
has been transmitted;
NOT ACK has been
received.
Last data byte in
I2DAT has been
transmitted (AA = 0);
ACK has been
received.
2
C bus
Application software response
To/From I2DAT
Load data byte or
Load data byte
Load data byte or
Load data byte
Load data byte or
Load data byte
No I2DAT action
or
No I2DAT action
or
No I2DAT action
or
No I2DAT action
No I2DAT action
or
No I2DAT action
or
No I2DAT action
or
No I2DAT action
Rev. 04 — 26 August 2009
To I2CON
STA STO SI
X
X
X
X
X
X
0
0
1
1
0
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Chapter 22: LPC24XX I
AA
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Next action taken by I
Last data byte will be transmitted and
ACK bit will be received.
Data byte will be transmitted; ACK will be
received.
Last data byte will be transmitted and
ACK bit will be received.
Data byte will be transmitted; ACK bit will
be received.
Last data byte will be transmitted and
ACK bit will be received.
Data byte will be transmitted; ACK bit will
be received.
Switched to not addressed SLV mode; no
recognition of own SLA or General call
address.
Switched to not addressed SLV mode;
Own SLA will be recognized; General call
address will be recognized if
I2ADR[0] = logic 1.
Switched to not addressed SLV mode; no
recognition of own SLA or General call
address. A START condition will be
transmitted when the bus becomes free.
Switched to not addressed SLV mode;
Own SLA will be recognized; General call
address will be recognized if
I2ADR[0] = logic 1. A START condition
will be transmitted when the bus becomes
free.
Switched to not addressed SLV mode; no
recognition of own SLA or General call
address.
Switched to not addressed SLV mode;
Own SLA will be recognized; General call
address will be recognized if
I2ADR[0] = logic 1.
Switched to not addressed SLV mode; no
recognition of own SLA or General call
address. A START condition will be
transmitted when the bus becomes free.
Switched to not addressed SLV mode;
Own SLA will be recognized; General call
address will be recognized if
I2ADR.0 = logic 1. A START condition will
be transmitted when the bus becomes
free.
2
C interfaces I
UM10237
© NXP B.V. 2009. All rights reserved.
2
C hardware
598 of 792
2
C0/1/2