LPC2458FET180,551 NXP Semiconductors, LPC2458FET180,551 Datasheet - Page 349

• Manufacturer Part Number: LPC2458FET180,551
• Description: IC ARM7 MCU FLASH 512K 180TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2458FET180,551

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 136
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 180-TFBGA
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN, Ethernet, I2C, I2S, IrDA, SPI, SSP, UART, USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, SAB-TFBGA180
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• On-chip Dac: 10 bit, 1 Channel
• Package: 180TFBGA
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 72 MHz
• For Use With: 622-1023 - BOARD SCKT ADAPTER FOR TFBGA180622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4258; 935282454551; LPC2458FET180-S

NXP Semiconductors
UM10237_4
User manual
9.5.3 USB Endpoint Index register (USBEpIn - 0xFFE0 C248)
9.5.4 USB MaxPacketSize register (USBMaxPSize - 0xFFE0 C24C)
}
The device will not respond to any transactions to unrealized endpoints. The SIE
Configure Device command will only cause realized and enabled endpoints to respond to
transactions. For details see
Each endpoint has a register carrying the MaxPacketSize value for that endpoint. This is
in fact a register array. Hence before writing, this register is addressed through the
USBEpIn register.
The USBEpIn register will hold the physical endpoint number. Writing to USBMaxPSize
will set the array element pointed to by USBEpIn. USBEpIn is a write only register.
Table 319. USB Endpoint Index register (USBEpIn - address 0xFFE0 C248) bit description
On reset, the control endpoint is assigned the maximum packet size of 8 bytes. Other
endpoints are assigned 0. Modifying USBMaxPSize will cause the endpoint buffer
addresses within the EP_RAM to be recalculated. This is a multi-cycle process. At the
end, the EP_RLZED bit will be set in USBDevIntSt
indexing is shown in
Table 320. USB MaxPacketSize register (USBMaxPSize - address 0xFFE0 C24C) bit
[1]
Bit
4:0
31:5
Bit
9:0
31:10 -
Reset value for EP0 and EP1. All other endpoints have a reset value of 0x0.
USBReEp |= (UInt32) ((0x1 << endpt));
/* Load Endpoint index Reg with physical endpoint no.*/
USBEpIn = (UInt32) endpointnumber;
/* load the max packet size Register */
USBEpMaxPSize = MPS;
/* check whether the EP_RLZED bit in the Device Interrupt Status register is set
*/
while (!(USBDevIntSt & EP_RLZED))
{
}
/* Clear the EP_RLZED bit */
Clear EP_RLZED bit in USBDevIntSt;
Symbol
PHY_EP
-
Symbol
MPS
description
/* wait until endpoint realization is complete */
Figure
Rev. 04 — 26 August 2009
Description
Physical endpoint number (0-31)
Reserved, user software should not write ones to reserved
bits. The value read from a reserved bit is not defined.
Description
The maximum packet size value.
Reserved, user software should not write ones to reserved
bits. The value read from a reserved bit is not defined.
13–46. USBMaxPSize is a read/write register.
Table
13–349.
Chapter 13: LPC24XX USB device controller
(Table
13–298). USBMaxPSize array
UM10237
© NXP B.V. 2009. All rights reserved.
Reset value
0
NA
Reset value
0x008
NA
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