DK-DEV-4SGX230N Altera, DK-DEV-4SGX230N Datasheet - Page 788

• Manufacturer Part Number: DK-DEV-4SGX230N
• Description: KIT DEVELOPMENT STRATIX IV
• Manufacturer: Altera
• Series: Stratix® IVr
• Type: FPGAr

Specifications of DK-DEV-4SGX230N

• Contents: Development Board, Universal Power Supply, Cables and Software
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Stratix
• Silicon Core Number: EP4S
• Silicon Family Name: Stratix IV GX
• Rohs Compliant: Yes
• For Use With/related Products: EP4SGX230K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2594

3–34
Figure 3–18. The ×N_Top and ×N_Bottom Clock Line Connections
Stratix IV Device Handbook Volume 2: Transceivers
Figure 3–18
Transceiver Block GXBR1
Transceiver Block GXBR2
Transceiver Block GXBR0
ATX R1 PLL Block
CMU0 Channel
ATX R0 PLL Block
CMU1 Channel
CMU0 Channel
CMU1 Channel
CMU1 Channel
CMU0 Channel
Channel 1
Channel 0
Channel 3
Channel 2
Channel 1
Channel 0
Channel 3
Channel 2
Channel 1
Channel 0
Channel 3
Channel 2
shows the different drivers of the ×N_Top and ×N_Bottom clock lines.
CMU1 GXBR0
CMU1 GXBR2
CMU1 GXBR1
x1
x1
x1
CMU0 GXBR2
CMU0 GXBR1
CMU0 GXBR0
Chapter 3: Configuring Multiple Protocols and Data Rates in Stratix IV Devices
x1
x1
x1
x4_GXBR2
Combining Transceiver Channels in Basic (PMA Direct) Configurations
x4_GXBR0
x4_GXBR1
xN_Bottom
xN_Top
February 2011 Altera Corporation