DK-DEV-4SGX230N Altera, DK-DEV-4SGX230N Datasheet - Page 181

• Manufacturer Part Number: DK-DEV-4SGX230N
• Description: KIT DEVELOPMENT STRATIX IV
• Manufacturer: Altera
• Series: Stratix® IVr
• Type: FPGAr

Specifications of DK-DEV-4SGX230N

• Contents: Development Board, Universal Power Supply, Cables and Software
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Stratix
• Silicon Core Number: EP4S
• Silicon Family Name: Stratix IV GX
• Rohs Compliant: Yes
• For Use With/related Products: EP4SGX230K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2594

Chapter 6: I/O Features in Stratix IV Devices
I/O Banks
Figure 6–4. Number of I/Os in Each Bank in EP4SE230 and EP4SE360 Devices in the 780-Pin FineLine BGA Package
Figure 6–5. Number of I/Os in Each Bank in EP4SE360, EP4SE530, and EP4SE820 Devices in the 1152-Pin FineLine BGA
Package
February 2011 Altera Corporation
1
Figure 6–4
information for different sets of available devices. They show the top view of the
silicon die that corresponds to a reverse view for flip chip packages. They are
graphical representations only.
For
dedicated clock pins, and dual purpose configuration pins. Transceiver pins and
dedicated configuration pins are not included in the pin count.
Number
of I/Os
48
42
42
48
Figure 6–4
Name
Bank 1A
Bank 1C
Bank 2C
Bank
Bank 2A
Number
of I/Os
through
32
26
26
32
Name
through
Bank 1A
Bank
Bank 1C
Bank 2C
Bank 2A
Figure 6–16
Figure
EP4SE360
EP4SE530
EP4SE820
EP4SE230
EP4SE360
6–16, the pin count includes all general purpose I/Os,
show the number of I/O pins and packaging
Bank 6A
Bank 6C
Bank 5C
Bank 5A
Name
Bank
Number
of I/Os
Bank 6A
Bank 6C
Bank 5C
Bank 5A
32
32
26
26
Name
Bank
Number
of I/Os
Stratix IV Device Handbook Volume 1
48
42
48
42
6–9