DK-DEV-4SGX230N Altera, DK-DEV-4SGX230N Datasheet - Page 207
![KIT DEVELOPMENT STRATIX IV](/photos/28/41/284156/dk-dev-4sgx230n_sml.jpg)
DK-DEV-4SGX230N
Manufacturer Part Number
DK-DEV-4SGX230N
Description
KIT DEVELOPMENT STRATIX IV
Manufacturer
Altera
Series
Stratix® IVr
Type
FPGAr
Datasheets
1.EP4SGX110DF29C3N.pdf
(80 pages)
2.EP4SGX110DF29C3N.pdf
(1154 pages)
3.DK-DEV-4SGX230N.pdf
(2 pages)
4.DK-DEV-4SGX530N.pdf
(57 pages)
Specifications of DK-DEV-4SGX230N
Contents
Development Board, Universal Power Supply, Cables and Software
Silicon Manufacturer
Altera
Core Architecture
FPGA
Core Sub-architecture
Stratix
Silicon Core Number
EP4S
Silicon Family Name
Stratix IV GX
Rohs Compliant
Yes
For Use With/related Products
EP4SGX230K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-2594
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DK-DEV-4SGX230N
Manufacturer:
Altera
Quantity:
135
- EP4SGX110DF29C3N PDF datasheet
- EP4SGX110DF29C3N PDF datasheet #2
- DK-DEV-4SGX230N PDF datasheet #3
- DK-DEV-4SGX530N PDF datasheet #4
- Current page: 207 of 1154
- Download datasheet (32Mb)
Chapter 6: I/O Features in Stratix IV Devices
OCT Calibration
February 2011 Altera Corporation
OCT Calibration Block Modes of Operation
1
For example,
voltage. If a group of I/O banks has the same V
calibration block to calibrate the group of I/O banks placed around the periphery.
Because 3B, 4C, 6C, and 7B have the same V
I/O banks (3B, 4C, 6C, and 7B) with the OCT calibration block (CB7) located in bank
7A. You can enable this by serially shifting out OCT R
OCT calibration block located in bank 7A to the I/O banks located around the
periphery.
I/O banks that do not contain calibration blocks share calibration blocks with I/O
banks that do contain calibration blocks.
Figure 6–23
chip packages. It is a graphical representation only. This figure does not show
transceiver banks and transceiver calibration blocks.
Figure 6–23. Example of Calibrating Multiple I/O Banks with One Shared OCT Calibration Block
Stratix IV devices support OCT R
occur in either power-up or user mode.
Power-Up Mode
In power-up mode, OCT calibration is automatically performed at power up.
Calibration codes are shifted to selected I/O buffers before transitioning to user
mode.
Bank 1A
Bank 1B
Bank 1C
Bank 2C
Bank 2B
Bank 2A
is a top view of the silicon die that corresponds to a reverse view for flip
Figure 6–23
Stratix IV
shows a group of I/O banks that has the same V
S
and OCT R
CCIO
Bank 6A
Bank 6B
Bank 6C
Bank 5C
Bank 5B
Bank 5A
T
CCIO
on all I/O banks. The calibration can
as bank 7A, you can calibrate all four
voltage, you can use one OCT
S
calibration codes from the
Stratix IV Device Handbook Volume 1
I/O bank with the same V
I/O bank with different V
CCIO
CCIO
CCIO
6–35
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