DK-DEV-4SGX230N Altera, DK-DEV-4SGX230N Datasheet - Page 285
![KIT DEVELOPMENT STRATIX IV](/photos/28/41/284156/dk-dev-4sgx230n_sml.jpg)
DK-DEV-4SGX230N
Manufacturer Part Number
DK-DEV-4SGX230N
Description
KIT DEVELOPMENT STRATIX IV
Manufacturer
Altera
Series
Stratix® IVr
Type
FPGAr
Datasheets
1.EP4SGX110DF29C3N.pdf
(80 pages)
2.EP4SGX110DF29C3N.pdf
(1154 pages)
3.DK-DEV-4SGX230N.pdf
(2 pages)
4.DK-DEV-4SGX530N.pdf
(57 pages)
Specifications of DK-DEV-4SGX230N
Contents
Development Board, Universal Power Supply, Cables and Software
Silicon Manufacturer
Altera
Core Architecture
FPGA
Core Sub-architecture
Stratix
Silicon Core Number
EP4S
Silicon Family Name
Stratix IV GX
Rohs Compliant
Yes
For Use With/related Products
EP4SGX230K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-2594
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DK-DEV-4SGX230N
Manufacturer:
Altera
Quantity:
135
- EP4SGX110DF29C3N PDF datasheet
- EP4SGX110DF29C3N PDF datasheet #2
- DK-DEV-4SGX230N PDF datasheet #3
- DK-DEV-4SGX530N PDF datasheet #4
- Current page: 285 of 1154
- Download datasheet (32Mb)
Chapter 8: High-Speed Differential I/O Interfaces and DPA in Stratix IV Devices
LVDS Channels
Table 8–5. LVDS Channels Supported in Stratix IV GX Device Row I/O Banks
Table 8–6. LVDS Channels Supported in Stratix IV GX Device Column I/O Banks
February 2011 Altera Corporation
EP4SGX360
EP4SGX530
Notes to
(1) Rx = true LVDS input buffers with OCT R
(2) The LVDS Rx and Tx channels are equally divided between the left and right sides of the device, except for the devices in the 780-pin Fineline
(3) The LVDS channel count does not include dedicated clock input pins.
(4) This package supports PMA-only transceiver channels.
(5) EP4SGX290 and EP4SGX360 devices are offered in the H780 package instead of the F780 package.
(6) EP4SGX530 devices are offered in the H1152 package instead of the F1152 package.
(7) EP4SGX530 devices are offered in the H1517 package instead of the F1517 package.
Notes to
(1) Rx = true LVDS input buffers without OCT R
(2) The LVDS Rx and Tx channels are equally divided between the left and right sides of the device.
(3) The LVDS channel count does not include dedicated clock input pins.
(4) This package supports PMA-only transceiver channels.
(5) EP4SGX290 and EP4SGX360 devices are offered in the H780 package instead of the F780 package.
(6) EP4SGX530 devices are offered in the H1152 package instead of the F1152 package.
(7) EP4SGX530 devices are offered in the H1517 package instead of the F1517 package.
(8) The Quartus II software version 9.0 does not support EP4SGX290 and EP4SGX360 devices in the 1932-Pin FineLine BGA package. These
EP4SGX110
EP4SGX180
EP4SGX230
EP4SGX290
EP4SGX360
EP4SGX530
EP4SGX70
Device
Device
LVDS_E_3R).
BGA. These devices have the LVDS Rx and Tx located on the left side of the device.
devices will be supported in a future release of the Quartus II software.
Table
Table
8–5:
8–6:
64 Rx or eTx +
64 Rx or eTx +
64 Rx or eTx +
64 Rx or eTx +
72 Rx or eTx +
72 Rx or eTx +
FineLine BGA
FineLine BGA
72 eTx
72 eTx
780-Pin
780-Pin
—
64 eTx
64 eTx
64 eTx
64 eTx
—
—
(5)
(5)
(5)
64 Rx or eTx +
96 Rx or eTx +
96 Rx or eTx +
96 Rx or eTx +
96 Rx or eTx +
44 Rx or eTx +
FineLine BGA
FineLine BGA
44 Tx or eTx
1152-Pin
1152-Pin
64 eTx
96 eTx
96 eTx
96 eTx
96 eTx
D
, Tx = true LVDS output buffers, eTx = emulated LVDS output buffers (either LVDS_E_1R or
—
—
—
D
, eTx = emulated LVDS output buffers (either LVDS_E_1R or LVDS_E_3R).
64 Rx or eTx +
64 Rx or eTx +
96 Rx or eTx +
96 Rx or eTx +
96 Rx or eTx +
96 Rx or eTx +
96 Rx or eTx +
44 Rx or eTx +
44 Rx or eTx +
FineLine BGA
FineLine BGA
44 Tx or eTx
44 Tx or eTx
96 eTx
1152-Pin
1152-Pin
64 eTx
64 eTx
96 eTx
96 eTx
96 eTx
96 eTx
(4)
(4)
(6)
(6)
96 Rx or eTx +
96 Rx or eTx +
96 Rx or eTx +
96 Rx or eTx +
96 Rx or eTx +
88 Rx or eTx +
88 Rx or eTx +
FineLine BGA
FineLine BGA
88 Tx or eTx
88 Tx or eTx
96 eTx
1517-Pin
1517-Pin
96 eTx
96 eTx
96 eTx
96 eTx
—
—
(7)
(Note
(7)
(Note
1), (2),
1), (2),
128 Rx or eTx +
128 Rx or eTx +
128 Rx or eTx +
88 Rx or eTx +
88 Rx or eTx +
FineLine BGA
FineLine BGA
88 Tx or eTx
88 Tx or eTx
1760-Pin
1760-Pin
128 eTx
128 eTx
128 eTx
Stratix IV Device Handbook Volume 1
(3)
—
—
—
—
(3)
(Part 2 of 2)
128 Rx or eTx +
128 Rx or eTx +
128 Rx or eTx +
98 Rx or eTx +
98 Rx or eTx +
FineLine BGA
FineLine BGA
98 Tx or eTx
98 Tx or eTx
128 eTx
128 eTx
1932-Pin
1932-Pin
128 eTx
—
—
—
—
(8)
(8)
8–7
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