DK-DEV-4SGX230N Altera, DK-DEV-4SGX230N Datasheet - Page 735

• Manufacturer Part Number: DK-DEV-4SGX230N
• Description: KIT DEVELOPMENT STRATIX IV
• Manufacturer: Altera
• Series: Stratix® IVr
• Type: FPGAr

Specifications of DK-DEV-4SGX230N

• Contents: Development Board, Universal Power Supply, Cables and Software
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Stratix
• Silicon Core Number: EP4S
• Silicon Family Name: Stratix IV GX
• Rohs Compliant: Yes
• For Use With/related Products: EP4SGX230K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2594

Chapter 2: Transceiver Clocking in Stratix IV Devices
FPGA Fabric-Transceiver Interface Clocking
Figure 2–33. FPGA Fabric-Receiver Interface Clocking for Example 6
Note to
(1) The green lines represent the low-speed parallel clock and the blue lines represent the high-speed serial clock.
February 2011 Altera Corporation
Figure
and Status
and Status
and Status
Channel 3
and Status
Channel 1
Channel 0
Channel 2
RX Data
RX Data
RX Data
RX Data
Logic
Logic
Logic
Logic
2–33:
FPGA
Fabric
rx_coreclk[0]
rx_coreclk[2]
rx_coreclk[1]
rx_coreclk[3]
Figure 2–33
tx_clkout[2]
tx_clkout[0]
Reference
shows the FPGA fabric-Receiver interface clocking for Example 6.
Reference
Clock
Clock
Compensation
Compensation
Compensation
Compensation
rdclk
rdclk
CMU1
CMU0
rdclk
rdclk
RX Phase
RX Phase
PLL
PLL
RX Phase
RX Phase
FIFO
FIFO
FIFO
FIFO
wrclk
wrclk
wrclk
wrclk
/2
/2
/2
/2
(Note 1)
Low-Speed Parallel Clock
Low-Speed Parallel Clock
Low-Speed Parallel Clock
Low-Speed Parallel Clock
Receiver Channel PCS
Receiver Channel PCS
Receiver Channel PCS
Receiver Channel PCS
Stratix IV Device Handbook Volume 2: Transceivers
CMU1 Channel
CMU0 Channel
Channel 1
Channel 3
Channel 2
Channel 0
Transmitter Channel PMA
Transmitter Channel PMA
Transmitter Channel PMA
Receiver Channel PMA
Receiver Channel PMA
Transmitter Channel PMA
Receiver Channel PMA
Receiver Channel PMA
Divider Block
Divider Block
Local Clock
Divider Block
Local Clock
High-Speed Serial Clock
Divider Block
Local Clock
Local Clock
2–63