DK-DEV-4SGX230N Altera, DK-DEV-4SGX230N Datasheet - Page 18

• Manufacturer Part Number: DK-DEV-4SGX230N
• Description: KIT DEVELOPMENT STRATIX IV
• Manufacturer: Altera
• Series: Stratix® IVr
• Type: FPGAr

Specifications of DK-DEV-4SGX230N

• Contents: Development Board, Universal Power Supply, Cables and Software
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Stratix
• Silicon Core Number: EP4S
• Silicon Family Name: Stratix IV GX
• Rohs Compliant: Yes
• For Use With/related Products: EP4SGX230K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2594

1–4
Stratix IV Device Handbook Volume 1
Stratix IV E Device
Stratix IV E devices provide an excellent solution for applications that do not require
high-speed CDR-based transceivers, but are logic, user I/O, or memory intensive.
Figure 1–2
Figure 1–2. Stratix IV E Chip View
Note to
(1) Resource counts vary with device selection, package selection, or both.
Figure
shows a high-level Stratix IV E chip view.
1–2:
and Soft-CDR
and Soft-CDR
High-Speed
High-Speed
Purpose
LVDS I/O
with DPA
Purpose
LVDS I/O
with DPA
General
I/O and
General
I/O and
High-Speed LVDS I/O with DPA
PLL
PLL
PLL
PLL
General Purpose I/O and
and Soft-CDR
General Purpose
General Purpose
I/O and Memory
I/O and Memory
Interface
Interface
(Note 1)
(Logic Elements, DSP,
Embedded Memory,
Clock Networks)
FPGA Fabric
PLL
PLL
PLL
PLL
General Purpose I/O and
150 Mbps-1.6 Gbps
LVDS interface with DPA and Soft-CDR
Chapter 1: Overview for the Stratix IV Device Family
General Purpose
General Purpose
I/O and Memory
I/O and Memory
Interface
Interface
February 2011 Altera Corporation
and Soft-CDR
and Soft-CDR
High-Speed
High-Speed
LVDS I/O
LVDS I/O
Purpose
with DPA
Purpose
with DPA
General
I/O and
General
I/O and
PLL
PLL
PLL
PLL
Feature Summary