EP4CGX150CF23I7N Altera, EP4CGX150CF23I7N Datasheet - Page 405

• Manufacturer Part Number: EP4CGX150CF23I7N
• Description: IC CYCLONE IV FPGA 150K 484FBGA
• Manufacturer: Altera
• Series: CYCLONE® IV GXr

Specifications of EP4CGX150CF23I7N

• Number Of Logic Elements/cells: 149760
• Number Of Labs/clbs: 9360
• Total Ram Bits: 6480000
• Number Of I /o: 270
• Voltage - Supply: 1.16 V ~ 1.24 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 484-FBGA
• Family Name: Cyclone IV
• Number Of Logic Blocks/elements: 149760
• # I/os (max): 270
• Operating Supply Voltage (typ): 1.2V
• Logic Cells: 149760
• Ram Bits: 6635520
• Operating Supply Voltage (min): 1.16V
• Operating Supply Voltage (max): 1.24V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

Chapter 3: Cyclone IV Dynamic Reconfiguration
Dynamic Reconfiguration Modes
Figure 3–6. Write Transaction Waveform—Use the same control signal for all the channels Option
Note to
(1) In this waveform example, you want to write to only the transmitter portion of the channel.
© December 2010 Altera Corporation
Figure
rx_tx_duplex_sel [1:0]
3–6:
tx_vodctrl [2:0]
reconfig_clk
write_all
For example, assume the number of channels controlled by the dynamic
reconfiguration controller is two, tx_vodctrl_out is 6 bits wide.
Write Transaction
The value you set at the selected PMA control ports is written to all the transceiver
channels connected to the ALTGX_RECONFIG instance.
For example, assume you have enabled tx_vodctrl in the ALTGX_RECONFIG
MegaWizard Plug-In Manager to reconfigure the V
complete a write transaction to reconfigure the V
1. Before you initiate a write transaction, set the selected PMA control ports to the
2. Set the rx_tx_duplex_sel port to 2'b10 so that only the transmit PMA controls are
3. Ensure that the busy signal is low before you start a write transaction.
4. Assert the write_all signal for one reconfig_clk clock cycle. This initiates the
5. The busy output status signal is asserted high to indicate that the dynamic
Figure 3–6
Read Transaction
If you want to read the existing values from a specific channel connected to the
ALTGX_RECONFIG instance, observe the corresponding byte positions of the PMA
control output port after the read transaction is completed.
For example, if the number of channels controlled by the ALTGX_RECONFIG is two,
the tx_vodctrl_out is 6 bits wide. The tx_vodctrl_out[2:0] signal corresponds to
channel 1 and the tx_vodctrl_out[5:3] signal corresponds to channel 2.
busy
(1)
desired settings (for example, tx_vodctrl = 3'b001).
written to the transceiver channel.
write transaction.
reconfiguration controller is busy writing the PMA control values. When the write
transaction has completed, the busy signal goes low.
shows the write transaction for Method 2.
3'b111
2'b00
3'b001
2'b10
OD
OD
, perform the following steps:
of the transceiver channels. To
Cyclone IV Device Handbook, Volume 2
3–15