EP4CGX150CF23I7N Altera, EP4CGX150CF23I7N Datasheet - Page 376

no-image

EP4CGX150CF23I7N

Manufacturer Part Number
EP4CGX150CF23I7N
Description
IC CYCLONE IV FPGA 150K 484FBGA
Manufacturer
Altera
Series
CYCLONE® IV GXr

Specifications of EP4CGX150CF23I7N

Number Of Logic Elements/cells
149760
Number Of Labs/clbs
9360
Total Ram Bits
6480000
Number Of I /o
270
Voltage - Supply
1.16 V ~ 1.24 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
484-FBGA
Family Name
Cyclone IV
Number Of Logic Blocks/elements
149760
# I/os (max)
270
Operating Supply Voltage (typ)
1.2V
Logic Cells
149760
Ram Bits
6635520
Operating Supply Voltage (min)
1.16V
Operating Supply Voltage (max)
1.24V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
484
Package Type
FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP4CGX150CF23I7N
Manufacturer:
Altera
Quantity:
10 000
Part Number:
EP4CGX150CF23I7N
Manufacturer:
ALTERA
0
Part Number:
EP4CGX150CF23I7N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Part Number:
EP4CGX150CF23I7N
0
2–10
Table 2–6. Reset and Power-Down Sequences for Non-Bonded Channel Configurations
Cyclone IV Device Handbook, Volume 2
Transmitter Only
Receiver Only
Receiver Only
Receiver and Transmitter
Receiver and Transmitter
Channel Set Up
1
3. After the multipurpose PLL locks, as indicated by the pll_locked signal going
4. In a bonded channel group, wait for at least t
5. After asserting the rx_locktodata signal, wait for at least t
Non-Bonded Channel Configuration
In non-bonded channels, each channel in the ALTGX MegaWizard Plug-In Manager
instance contains its own tx_digitalreset, rx_analogreset,
rx_digitalreset, and rx_freqlocked signals.
You can reset each channel independently. For example, if there are four non-bonded
channels, the ALTGX MegaWizard Plug-In Manager provides four each of the
following signals: tx_digitalreset, rx_analogreset, rx_digitalreset, and
rx_freqlocked.
Table 2–6
configuration under the stated functional modes.
Follow the same reset sequence for all the other channels in the non-bonded
configuration.
Transmitter Only Channel
This configuration contains only a transmitter channel. If you create a Transmitter
Only instance in the ALTGX MegaWizard Plug-In Manager, use the same reset
sequence shown in
Receiver Only Channel—Receiver CDR in Automatic Lock Mode
This configuration contains only a receiver channel. If you create a Receiver Only
instance in the ALTGX MegaWizard Plug-In Manager with the receiver CDR in
automatic lock mode, use the reset sequence shown in
high (marker 3), deassert the tx_digitalreset signal (marker 4). For the
receiver operation, after deassertion of the busy signal, wait for two parallel clock
cycles to deassert the rx_analogreset signal.
rx_locktorefclk and assert rx_locktodata (marker 7). At this point, the
receiver CDR of all the channels enters into lock-to-data mode and starts locking to
the received data.
deasserting rx_digitalreset (the time between markers 7 and 8). At this point,
the transmitter and receiver are ready for data traffic.
Basic ×1
Automatic lock mode
Manual lock mode
Automatic lock mode
Manual lock mode
lists the reset and power-down sequences for one channel in a non-bonded
Receiver CDR Mode
Figure 2–3 on page
“Transmitter Only Channel” on page 2–10
“Receiver Only Channel—Receiver CDR in Automatic
Lock Mode” on page 2–10
“Receiver Only Channel—Receiver CDR in Manual Lock
Mode” on page 2–12
“Receiver and Transmitter Channel—Receiver CDR in
Automatic Lock Mode” on page 2–13
“Receiver and Transmitter Channel—Receiver CDR in
Manual Lock Mode” on page 2–14
2–6.
Chapter 2: Cyclone IV Reset Control and Power Down
LTR_LTD_Manual
Figure
Refer to
© December 2010 Altera Corporation
, then deassert
2–6.
LTD_Manual
Transceiver Reset Sequences
before

Related parts for EP4CGX150CF23I7N