EP4CGX150CF23I7N Altera, EP4CGX150CF23I7N Datasheet - Page 336

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EP4CGX150CF23I7N

Manufacturer Part Number
EP4CGX150CF23I7N
Description
IC CYCLONE IV FPGA 150K 484FBGA
Manufacturer
Altera
Series
CYCLONE® IV GXr

Specifications of EP4CGX150CF23I7N

Number Of Logic Elements/cells
149760
Number Of Labs/clbs
9360
Total Ram Bits
6480000
Number Of I /o
270
Voltage - Supply
1.16 V ~ 1.24 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
484-FBGA
Family Name
Cyclone IV
Number Of Logic Blocks/elements
149760
# I/os (max)
270
Operating Supply Voltage (typ)
1.2V
Logic Cells
149760
Ram Bits
6635520
Operating Supply Voltage (min)
1.16V
Operating Supply Voltage (max)
1.24V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
484
Package Type
FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant

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Quantity
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0
1–56
Cyclone IV Device Handbook, Volume 2
Figure 1–56
Figure 1–56. Transceiver Configuration in GIGE Mode
When configured in GIGE mode, three encoded comma (/K28.5/) code groups are
transmitted automatically after deassertion of tx_digitalreset and before
transmitting user data on the tx_datain port. This could affect the synchronization
state machine behavior at the receiver.
Depending on when you start transmitting the synchronization sequence, there could
be an even or odd number of encoded data (/Dx.y/) code groups transmitted
between the last of the three automatically sent /K28.5/ code groups and the first
/K28.5/ code group of the synchronization sequence. If there is an even number of
/Dx.y/ code groups received between these two /K28.5/ code groups, the first
/K28.5/ code group of the synchronization sequence begins at an odd code group
boundary. An IEEE802.3-compliant GIGE synchronization state machine treats this as
an error condition and goes into the Loss-of-Sync state.
Figure 1–57
automatically sent /K28.5/ and the first user-sent /K28.5/. The first user-sent
/K28.5/ code group received at an odd code group boundary in cycle n + 3 takes the
receiver synchronization state machine in Loss-of-Sync state. The first
synchronization ordered-set /K28.5/Dx.y/ in cycles n + 3 and n + 4 is discounted and
three additional ordered sets are required for successful synchronization.
Functional Mode
Channel Bonding
Low-Latency PCS
Word Aligner (Pattern Length)
8B/10B Encoder/Decoder
Rate Match FIFO
Byte SERDES
Byte Ordering
FPGA Fabric-to-Transceiver
Interface Width
FPGA Fabric-to-Transceiver
Interface Frequency (MHz)
Data Rate (Gbps)
shows the transceiver configuration in GIGE mode.
shows an example of even numbers of /Dx.y/ between the last
Chapter 1: Cyclone IV Transceivers Architecture
State Machine (7-bit, 10-Bit)
Automatic Synchronization
Disabled
Disabled
Enabled
Enabled
Disabled
GIGE
8-Bit
1.25
125
×1
© December 2010 Altera Corporation
Transceiver Functional Modes

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