EP4CGX150CF23I7N Altera, EP4CGX150CF23I7N Datasheet - Page 250

• Manufacturer Part Number: EP4CGX150CF23I7N
• Description: IC CYCLONE IV FPGA 150K 484FBGA
• Manufacturer: Altera
• Series: CYCLONE® IV GXr

Specifications of EP4CGX150CF23I7N

• Number Of Logic Elements/cells: 149760
• Number Of Labs/clbs: 9360
• Total Ram Bits: 6480000
• Number Of I /o: 270
• Voltage - Supply: 1.16 V ~ 1.24 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 484-FBGA
• Family Name: Cyclone IV
• Number Of Logic Blocks/elements: 149760
• # I/os (max): 270
• Operating Supply Voltage (typ): 1.2V
• Logic Cells: 149760
• Ram Bits: 6635520
• Operating Supply Voltage (min): 1.16V
• Operating Supply Voltage (max): 1.24V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

9–4
Error Detection Block
Table 9–3. Types of CRC Detection to Check the Configuration Bits
Error Detection Registers
Cyclone IV Device Handbook, Volume 1
■
■
CRAM error checking ability (32-bit CRC)
during user mode, for use by the
CRC_ERROR pin.
There is only one 32-bit CRC value. This
value covers all the CRAM data.
First Type of CRC Detection
f
1
The CRC_ERROR pin information for Cyclone IV devices is reported in the
Devices Pin-Outs
WYSIWYG is an optimization technique that performs optimization on a VQM
(Verilog Quartus Mapping) netlist in the Quartus II software.
Table 9–3
This section focuses on the first type—the 32-bit CRC when the device is in user
mode.
There are two sets of 32-bit registers in the error detection circuitry that store the
computed CRC signature and pre-calculated CRC value. A non-zero value on the
signature register causes the CRC_ERROR pin to set high.
Figure 9–1
32-bit registers: the signature register and the storage register.
Figure 9–1. Error Detection Block Diagram
lists the types of CRC detection to check the configuration bits.
Error Detection
shows the block diagram of the error detection block and the two related
State Machine
32-bit Storage
Register
on the Altera
■
■
■
■
■
16-bit CRC embedded in every configuration data frame.
During configuration, after a frame of data is loaded into the device, the
pre-computed CRC is shifted into the CRC circuitry.
Simultaneously, the CRC value for the data frame shifted-in is calculated.
If the pre-computed CRC and calculated CRC values do not match,
nSTATUS is set low.
Every data frame has a 16-bit CRC. Therefore, there are many 16-bit CRC
values for the whole configuration bit stream.
Every device has a different length of configuration data frame.
®
32
Control Signals
website.
Second Type of CRC Detection
Chapter 9: SEU Mitigation in Cyclone IV Devices
Compute & Compare
32-bit Signature
Register
CRC
© February 2010 Altera Corporation
32
32
Error Detection Block
Cyclone IV