OM13008,598 NXP Semiconductors, OM13008,598 Datasheet - Page 63
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OM13008,598
Manufacturer Part Number
OM13008,598
Description
BOARD LPC XPRESSO LPC122X
Manufacturer
NXP Semiconductors
Series
LPCXpressor
Specifications of OM13008,598
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-6642
OM13008
OM13008
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NXP Semiconductors
UM10441
User manual
Table 61.
Table 62.
Bit
15:13
31:16
Bit
2:0
5:3
6
9:7
10
12:11
Symbol
CLK_DIV
-
Symbol
FUNC
-
INV
-
TOD
S_MODE
IOCON register bit allocation (except I
IOCON register bit allocation (I
All information provided in this document is subject to legal disclaimers.
Value
0x0
0x1
0x2
0x3
0x4
0x5
0x6
-
Value
000
001
010
011
100
101
110
111
0
1
-
0
1
00
01
10
11
Rev. 1.1 — 10 March 2011
Description
Select peripheral clock divider for input filter sampling clock.
Value 0x7 is reserved. (see
IOCONFIGCLKDIV0.
IOCONFIGCLKDIV1.
IOCONFIGCLKDIV2.
IOCONFIGCLKDIV3.
IOCONFIGCLKDIV4.
IOCONFIGCLKDIV5.
IOCONFIGCLKDIV6.
Reserved.
Description
Selects pin function.
Selects function 0 (default).
Select function 1.
Select function 2.
Select function 3.
Select function 4.
Select function 5.
Select function 6.
Reserved.
Reserved.
Invert input
Input not inverted.
Input inverted.
Reserved.
True open-drain mode.
Disable.
True open-drain mode enabled.
Sample mode
Bypass input filter.
Sampling for 1 filter clock cycle. Input pulses shorter than one
filter clock are rejected.
Sampling for 2 filter clock cycles. Input pulses shorter than
two filter clocks are rejected.
Sampling for 3 filter clock cycles. Input pulses shorter than
three filter clocks are rejected.
Chapter 6: LPC122x I/O configuration (IOCONFIG)
2
C-bus pins PIO0_10 and PIO0_11)
2
C-pins)
Table
31).
UM10441
© NXP B.V. 2011. All rights reserved.
63 of 442
Reset
value
000
0
Reset
value
000
000
0
001
0
00
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