OM13008,598 NXP Semiconductors, OM13008,598 Datasheet - Page 359

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OM13008,598

Manufacturer Part Number
OM13008,598
Description
BOARD LPC XPRESSO LPC122X
Manufacturer
NXP Semiconductors
Series
LPCXpressor
Datasheets

Specifications of OM13008,598

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-6642
OM13008
NXP Semiconductors
UM10441
User manual
25.3.1.3.1 General-purpose registers
25.3.1.3.2 Stack Pointer
Table 353. Core register set summary
[1]
[2]
R0-R12 are 32-bit general-purpose registers for data operations.
The Stack Pointer (SP) is register R13. In Thread mode, bit[1] of the CONTROL register
indicates the stack pointer to use:
Name
R0-R12
MSP
PSP
LR
PC
PSR
APSR
IPSR
EPSR
PRIMASK
CONTROL
Fig 61. Processor core register set
Describes access type during program execution in thread mode and Handler mode. Debug access can
differ.
Bit[24] is the T-bit and is loaded from bit[0] of the reset vector.
0 = Main Stack Pointer (MSP). This is the reset value.
1 = Process Stack Pointer (PSP).
High registers
Low registers
Program Counter
Stack Pointer
Link Register
RW
RO
Type
RW
RW
RW
RW
RW
RW
RO
RW
RW
All information provided in this document is subject to legal disclaimers.
[1]
Rev. 1.1 — 10 March 2011
Reset value
Unknown
See description
Unknown
Unknown
See description
Unknown
Unknown
0x00000000
Unknown
0x00000000
0x00000000
CONTROL
PRIMASK
PC (R15)
SP (R13)
LR (R14)
PSR
R10
R11
R12
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
[2]
[2]
Chapter 25: LPC122x Appendix ARM Cortex-M0
Program Status Register
Interrupt mask register
Control Register
Description
Section 25–25.3.1.3.1
Section 25–25.3.1.3.2
Section 25–25.3.1.3.2
Section 25–25.3.1.3.3
Section 25–25.3.1.3.4
Table 25–354
Table 25–355
Table 356
Table 25–357
Table 25–358
Table 25–359
General purpose registers
PSP
Special registers
UM10441
© NXP B.V. 2011. All rights reserved.
MSP
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