OM13008,598 NXP Semiconductors, OM13008,598 Datasheet - Page 387

• Manufacturer Part Number: OM13008,598
• Description: BOARD LPC XPRESSO LPC122X
• Manufacturer: NXP Semiconductors
• Series: LPCXpressor

Specifications of OM13008,598

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-6642; OM13008

NXP Semiconductors
UM10441
User manual
25.4.4.2.4 Condition flags
25.4.4.2.5 Examples
25.4.4.3.1 Syntax
25.4.4.3.2 Operation
25.4.4.3 LDR and STR, register offset
These instructions do not change the flags.
Load and Store with register offset.
LDR Rt, [Rn, Rm]
LDR<B|H> Rt, [Rn, Rm]
LDR<SB|SH> Rt, [Rn, Rm]
STR Rt, [Rn, Rm]
STR<B|H> Rt, [Rn, Rm]
where:
LDR, LDRB, U, LDRSB and LDRSH load the register specified by Rt with either a word,
zero extended byte, zero extended halfword, sign extended byte or sign extended
halfword value from memory.
STR, STRB and STRH store the word, least-significant byte or lower halfword contained
in the single register specified by Rt into memory.
The memory address to load from or store to is the sum of the values in the registers
specified by Rn and Rm.
•
•
Rt is the register to load or store.
Rn is the register on which the memory address is based.
Rm is a register containing a value to be used as the offset.
imm must be between:
– 0 and 1020 and an integer multiple of four for LDR and STR
– 0 and 124 and an integer multiple of four for LDR and STR
– 0 and 62 and an integer multiple of two for LDRH and STRH
– 0 and 31 for LDRB and STRB.
The computed address must be divisible by the number of bytes in the transaction,
see
LDR
STR
using SP as the base register
using R0-R7 as the base register
Section
R4, [R7
R2, [R0,#const-struc] ; const-struc is an expression evaluating
All information provided in this document is subject to legal disclaimers.
25–25.4.3.4.
Rev. 1.1 — 10 March 2011
; Loads R4 from the address in R7.
; to a constant in the range 0-1020.
Chapter 25: LPC122x Appendix ARM Cortex-M0
UM10441
© NXP B.V. 2011. All rights reserved.
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