OM13008,598 NXP Semiconductors, OM13008,598 Datasheet - Page 437

• Manufacturer Part Number: OM13008,598
• Description: BOARD LPC XPRESSO LPC122X
• Manufacturer: NXP Semiconductors
• Series: LPCXpressor

Specifications of OM13008,598

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-6642; OM13008

NXP Semiconductors
Chapter 12: LPC122x SSP controller
12.1
12.2
12.3
12.4
12.5
12.6
12.6.1
12.6.2
12.6.3
12.6.4
12.6.5
12.6.6
12.6.7
12.6.8
Chapter 13: LPC122x 16-bit Counter/timer 0/1 (CT16B0/1)
13.1
13.2
13.3
13.4
13.5
13.6
13.7
13.7.1
13.7.2
13.7.3
13.7.4
13.7.5
Chapter 14: LPC122x 32-bit Counter/timer 0/1 (CT32B0/1)
14.1
14.2
14.3
14.4
14.5
14.6
14.7
14.7.1
14.7.2
14.7.3
14.7.4
14.7.5
Chapter 15: LPC122x System Tick (SysTick) timer
15.1
15.2
15.3
15.4
15.5
UM10441
User manual
How to read this chapter . . . . . . . . . . . . . . . . 223
Basic configuration . . . . . . . . . . . . . . . . . . . . 223
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 223
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . 223
Pin description . . . . . . . . . . . . . . . . . . . . . . . . 224
Register description . . . . . . . . . . . . . . . . . . . 224
How to read this chapter . . . . . . . . . . . . . . . . 238
Basic configuration . . . . . . . . . . . . . . . . . . . . 238
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 238
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . 238
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . 239
Pin description . . . . . . . . . . . . . . . . . . . . . . . . 239
Register description . . . . . . . . . . . . . . . . . . . 239
How to read this chapter . . . . . . . . . . . . . . . . 254
Basic configuration . . . . . . . . . . . . . . . . . . . . 254
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 254
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . 254
General description . . . . . . . . . . . . . . . . . . . . 255
Pin description . . . . . . . . . . . . . . . . . . . . . . . . 255
Register description . . . . . . . . . . . . . . . . . . . 255
How to read this chapter . . . . . . . . . . . . . . . . 270
Basic configuration . . . . . . . . . . . . . . . . . . . . 270
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 270
General description . . . . . . . . . . . . . . . . . . . . 270
Register description . . . . . . . . . . . . . . . . . . . 271
SSP Control Register 0 . . . . . . . . . . . . . . . . 225
SSP Control Register 1 . . . . . . . . . . . . . . . . 226
SSP Data Register . . . . . . . . . . . . . . . . . . . . 227
SSP Status Register . . . . . . . . . . . . . . . . . . 227
SSP Clock Prescale Register . . . . . . . . . . . 227
SSP Interrupt Mask Set/Clear Register (IMSC -
0x4004 0014) . . . . . . . . . . . . . . . . . . . . . . . . 228
SSP Raw Interrupt Status Register . . . . . . . 228
SSP Masked Interrupt Status Register . . . . 229
Interrupt Register . . . . . . . . . . . . . . . . . . . . . 242
Timer Control Register . . . . . . . . . . . . . . . . . 242
Timer Counter . . . . . . . . . . . . . . . . . . . . . . . 242
Prescale Register . . . . . . . . . . . . . . . . . . . . 243
Prescale Counter register . . . . . . . . . . . . . . 243
Interrupt Register . . . . . . . . . . . . . . . . . . . . . 257
Timer Control Register . . . . . . . . . . . . . . . . . 258
Timer Counter registers . . . . . . . . . . . . . . . . 258
Prescale Register . . . . . . . . . . . . . . . . . . . . . 258
Prescale Counter Register . . . . . . . . . . . . . 259
All information provided in this document is subject to legal disclaimers.
Rev. 1.1 — 10 March 2011
12.6.9
12.6.10
12.7
12.7.1
12.7.2
12.7.2.1
12.7.2.2
12.7.2.3
12.7.2.4
12.7.2.5
12.7.3
12.7.3.1
13.7.6
13.7.7
13.7.8
13.7.9
13.7.10
13.7.10.1 DMA operation . . . . . . . . . . . . . . . . . . . . . . . 248
13.7.11
13.7.12
13.7.13
13.8
13.9
14.7.6
14.7.7
14.7.8
14.7.9
14.7.10
14.7.10.1 DMA operation . . . . . . . . . . . . . . . . . . . . . . . 264
14.7.11
14.7.12
14.7.13
14.8
14.9
15.5.1
15.5.2
15.5.3
15.5.4
15.6
Functional description . . . . . . . . . . . . . . . . . 230
Example timer operation . . . . . . . . . . . . . . . 252
Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . 253
Example timer operation . . . . . . . . . . . . . . . 268
Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . 268
Functional description . . . . . . . . . . . . . . . . . 273
SSP Interrupt Clear Register . . . . . . . . . . . 229
SSP DMA Control Register . . . . . . . . . . . . . 230
Texas Instruments synchronous serial frame
format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 230
SPI frame format . . . . . . . . . . . . . . . . . . . . . 231
Clock Polarity (CPOL) and Phase (CPHA)
control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 231
SPI format with CPOL=0,CPHA=0. . . . . . . . 232
SPI format with CPOL=0,CPHA=1. . . . . . . . 233
SPI format with CPOL = 1,CPHA = 0. . . . . . 233
SPI format with CPOL = 1,CPHA = 1. . . . . . 235
Semiconductor Microwire frame format . . . . 235
Setup and hold time requirements on CS with
respect to SK in Microwire mode . . . . . . . . . 237
Match Control Register . . . . . . . . . . . . . . . . 243
Match Registers . . . . . . . . . . . . . . . . . . . . . 245
Capture Control Register . . . . . . . . . . . . . . 245
Capture Registers . . . . . . . . . . . . . . . . . . . . 246
External Match Register . . . . . . . . . . . . . . . 247
Count Control Register . . . . . . . . . . . . . . . . 249
PWM Control register . . . . . . . . . . . . . . . . . 250
Rules for single edge controlled PWM
outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 251
Match Control Register . . . . . . . . . . . . . . . . 259
Match Registers . . . . . . . . . . . . . . . . . . . . . . 260
Capture Control Register (CCR and CCR) . 261
Capture Register . . . . . . . . . . . . . . . . . . . . . 262
External Match Register . . . . . . . . . . . . . . . 262
Count Control Register . . . . . . . . . . . . . . . . 264
PWM Control Register . . . . . . . . . . . . . . . . 266
Rules for single edge controlled PWM
outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 267
System Timer Control and status register . . 271
System Timer Reload value register . . . . . . 272
System Timer Current value register . . . . . 272
System Timer Calibration value register
(SYST_CALIB - 0xE000 E01C) . . . . . . . . . . 272
Chapter 26: Supplementary information
UM10441
© NXP B.V. 2011. All rights reserved.
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