OM13008,598 NXP Semiconductors, OM13008,598 Datasheet - Page 398

• Manufacturer Part Number: OM13008,598
• Description: BOARD LPC XPRESSO LPC122X
• Manufacturer: NXP Semiconductors
• Series: LPCXpressor

Specifications of OM13008,598

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-6642; OM13008

NXP Semiconductors
UM10441
User manual
25.4.5.6.2 Operation
25.4.5.6.3 Restrictions
25.4.5.6.4 Condition flags
25.4.5.6.5 Examples
25.4.5.7.1 Syntax
25.4.5.7.2 Operation
25.4.5.7.3 Restrictions
25.4.5.7 REV, REV16, and REVSH
The MUL instruction multiplies the values in the registers specified by Rn and Rm, and
places the least significant 32 bits of the result in Rd. The condition code flags are
updated on the result of the operation, see
The results of this instruction does not depend on whether the operands are signed or
unsigned.
In this instruction:
This instruction:
Reverse bytes.
REV Rd, Rn
REV16 Rd, Rn
REVSH Rd, Rn
where:
Use these instructions to change endianness of data:
REV — converts 32-bit big-endian data into little-endian data or 32-bit little-endian data
into big-endian data.
REV16 — converts two packed 16-bit big-endian data into little-endian data or two packed
16-bit little-endian data into big-endian data.
REVSH — converts 16-bit signed big-endian data into 32-bit signed little-endian data or
16-bit signed little-endian data into 32-bit signed big-endian data.
In these instructions, Rd, and Rn must only specify R0-R7.
•
•
•
•
Rd is the destination register.
Rn is the source register.
Rd, Rn, and Rm must only specify R0-R7
Rd must be the same as Rm.
updates the N and Z flags according to the result
does not affect the C or V flags.
MULS
R0, R2, R0
All information provided in this document is subject to legal disclaimers.
Rev. 1.1 — 10 March 2011
; Multiply with flag update, R0 = R0 x R2
Chapter 25: LPC122x Appendix ARM Cortex-M0
Section
25–25.4.3.6.
UM10441
© NXP B.V. 2011. All rights reserved.
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