OM13008,598 NXP Semiconductors, OM13008,598 Datasheet - Page 19

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OM13008,598

Manufacturer Part Number
OM13008,598
Description
BOARD LPC XPRESSO LPC122X
Manufacturer
NXP Semiconductors
Series
LPCXpressor
Datasheets

Specifications of OM13008,598

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-6642
OM13008
NXP Semiconductors
UM10441
User manual
4.5.7 Internal resonant crystal control register
4.5.8 System reset status register
Table 13.
This register is used to trim the on-chip 12 MHz oscillator. The trim value is factory-preset
and written by the boot code on start-up.
Table 14.
The SYSRSTSTAT register shows the source of the latest reset event. The bits are
cleared by writing a one to any of the bits. The POR event clears all other bits in this
register, but if another reset signal (e.g., EXTRST) remains asserted after the POR signal
is negated, then its bit is set to detected.
Table 15.
Bit
8:5
31:9
Bit
7:0
31:9
Bit
0
Symbol
FREQSEL
-
Symbol
TRIM
-
Symbol
POR
Watchdog oscillator control register (WDTOSCCTRL, address 0x4004 8024) bit
description
Internal resonant crystal control register (IRCCTRL, address 0x4004 8028) bit
description
System reset status register (SYSRESSTAT, address 0x4004 8030) bit description
All information provided in this document is subject to legal disclaimers.
Value
0x1
0x2
0x3
0x4
0x5
0x6
0x7
0x8
0x9
0xA
0xB
0xC
0xD
0xE
0xF
-
Description
Trim value
Reserved
Value
0
1
Rev. 1.1 — 10 March 2011
…continued
Description
Select watchdog oscillator analog output frequency
(Fclkana).
0.5 MHz
0.8 MHz
1.1 MHz
1.4 MHz
1.6 MHz
1.8 MHz
2.0 MHz
2.2 MHz
2.4 MHz
2.6 MHz
2.7 MHz
2.9 MHz
3.1 MHz
3.2 MHz
3.4 MHz
Reserved
Description
POR reset status
no POR detected
POR detected
Chapter 4: LPC122x System control (SYSCON)
Reset value
0x000 0080, then flash will reprogram
0x00
UM10441
© NXP B.V. 2011. All rights reserved.
19 of 442
Reset
value
0
Reset
value
0
-

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