OM13008,598 NXP Semiconductors, OM13008,598 Datasheet - Page 177

• Manufacturer Part Number: OM13008,598
• Description: BOARD LPC XPRESSO LPC122X
• Manufacturer: NXP Semiconductors
• Series: LPCXpressor

Specifications of OM13008,598

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-6642; OM13008

NXP Semiconductors
UM10441
User manual
10.5.12.1.1 Example 1: UART_PCLK = 14.7456 MHz, BR = 9600
10.5.12.1.2 Example 2: UART_PCLK = 12 MHz, BR = 115200
10.5.13 UART Transmit Enable Register
Table 177. Fractional Divider setting look-up table
According to the provided algorithm DL
= 96. Since this DL
DLL = 96.
According to the provided algorithm DL
6.51. This DL
parameter. Using an initial estimate of FR
is recalculated as FR
and 1.9, DIVADDVAL and MULVAL values can be obtained from the attached look-up
table.
The closest value for FRest = 1.628 in the look-up
equivalent to DIVADDVAL = 5 and MULVAL = 8.
Based on these findings, the suggested UART setup would be: DLM = 0, DLL = 4,
DIVADDVAL = 5, and MULVAL = 8. According to
has a relative error of 0.16% from the originally specified 115200.
In addition to being equipped with full hardware flow control (auto-cts and auto-rts
mechanisms described above), TER enables implementation of software flow control, too.
When TXEn =1, UART transmitter will keep sending data as long as they are available. As
soon as TXEn becomes 0, UART transmission will stop.
FR
1.000
1.067
1.071
1.077
1.083
1.091
1.100
1.111
1.125
1.133
1.143
1.154
1.167
1.182
1.200
1.214
1.222
1.231
DivAddVal/
MulVal
0/1
1/15
1/14
1/13
1/12
1/11
1/10
1/9
1/8
2/15
1/7
2/13
1/6
2/11
1/5
3/14
2/9
3/13
est
All information provided in this document is subject to legal disclaimers.
is not an integer number and the next step is to estimate the FR
est
est
is an integer number, DIVADDVAL = 0, MULVAL = 1, DLM = 0, and
Rev. 1.1 — 10 March 2011
FR
1.250
1.267
1.273
1.286
1.300
1.308
1.333
1.357
1.364
1.375
1.385
1.400
1.417
1.429
1.444
1.455
1.462
1.467
= 1.628. Since FRest = 1.628 is within the specified range of 1.1
DivAddVal/
MulVal
1/4
4/15
3/11
2/7
3/10
4/13
1/3
5/14
4/11
3/8
5/13
2/5
5/12
3/7
4/9
5/11
6/13
7/15
est
est
est
= PCLK/(16 x BR) = 14.7456 MHz / (16 x 9600)
= PCLK/(16 x BR) = 12 MHz / (16 x 115200) =
= 1.5 a new DL
FR
1.500
1.533
1.538
1.545
1.556
1.571
1.583
1.600
1.615
1.625
1.636
1.643
1.667
1.692
1.700
1.714
1.727
1.733
Equation 5
Table 177
DivAddVal/
MulVal
1/2
8/15
7/13
6/11
5/9
4/7
7/12
3/5
8/13
5/8
7/11
9/14
2/3
9/13
7/10
5/7
8/11
11/15
Chapter 10: LPC122x UART1
est
UART’s is 115384. This rate
is FR = 1.625. It is
= 4 is calculated and FR
FR
1.750
1.769
1.778
1.786
1.800
1.818
1.833
1.846
1.857
1.867
1.875
1.889
1.900
1.909
1.917
1.923
1.929
1.933
UM10441
© NXP B.V. 2011. All rights reserved.
DivAddVal/
MulVal
3/4
10/13
7/9
11/14
4/5
9/11
5/6
11/13
6/7
13/15
7/8
8/9
9/10
10/11
11/12
12/13
13/14
14/15
177 of 442
est