OM13008,598 NXP Semiconductors, OM13008,598 Datasheet - Page 179

• Manufacturer Part Number: OM13008,598
• Description: BOARD LPC XPRESSO LPC122X
• Manufacturer: NXP Semiconductors
• Series: LPCXpressor

Specifications of OM13008,598

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-6642; OM13008

NXP Semiconductors
UM10441
User manual
The UART transmitter block, TX, accepts data written by the CPU or host and buffers the
data in the UART TX Holding Register FIFO (THR). The UART TX Shift Register (TSR)
reads the data stored in the THR and assembles the data to transmit via the serial output
pin, TXD1.
The UART Baud Rate Generator block, BRG, generates the timing enables used by the
UART TX block. The BRG clock input source is UART_PCLK. The main clock is divided
down per the divisor specified in the DLL and DLM registers. This divided down clock is a
16x oversample clock, NBAUDOUT.
The interrupt interface contains registers IER and IIR. The interrupt interface receives
several one clock wide enables from the TX and RX blocks.
Status information from the TX and RX is stored in the LSR. Control information for the TX
and RX is stored in the LCR.
Fig 12. UART1 block diagram
U1INTR
All information provided in this document is subject to legal disclaimers.
INTERRUPT
U1IER
U1IIR
U1SCR
Rev. 1.1 — 10 March 2011
INTERFACE
APB
U1THR
U1RBR
U1FCR
U1LSR
U1LCR
U1BRG
U1DLM
U1DLL
Chapter 10: LPC122x UART1
U1RX
U1TX
U1TSR
U1RSR
UM10441
© NXP B.V. 2011. All rights reserved.
U1FIFOLVL
NBAUDOUT
RCLK
RXD
TXD
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