OM13008,598 NXP Semiconductors, OM13008,598 Datasheet - Page 160

• Manufacturer Part Number: OM13008,598
• Description: BOARD LPC XPRESSO LPC122X
• Manufacturer: NXP Semiconductors
• Series: LPCXpressor

Specifications of OM13008,598

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-6642; OM13008

10.1 How to read this chapter
10.2 Basic configuration
10.3 Features
10.4 Pin description
10.5 Register description
UM10441
User manual
The UART1 is available on all LPC122x parts.
Clocks and power to the UART1 block are controlled by:
Remark: The UART1 pins must be configured in the corresponding IOCON registers
before the UART1 clocks are enabled.
The UART1_PCLK can be disabled in the UART1CLKDIV register (see
the UART block can be disabled through the System AHB clock control register bit 13
(see
Table 160. UART1 pin description
The UART contains registers organized as shown in
Bit (DLAB) is contained in LCR[7] and enables access to the Divisor Latches.
Pin
RXD1
TXD1
1. The SYSAHBCLKCTRL register (see
2. The UART1_PCLK which is enabled in the UART1 clock divider register (see
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UM10441
Chapter 10: LPC122x UART1
Rev. 1.1 — 10 March 2011
Table
16-byte receive and transmit FIFOs.
Register locations conform to ‘550 industry standard.
Receiver FIFO trigger points at 1, 4, 8, and 14 byte.
Built-in baud rate generator.
UART allows for implementation of either software or hardware flow control.
IrDA mode to support infrared communication.
Table
24). This clock is used by the UART baud rate generator.
Type
Input
Output Serial Output. Serial transmit data.
21) for power savings.
All information provided in this document is subject to legal disclaimers.
Description
Serial Input. Serial receive data.
Rev. 1.1 — 10 March 2011
Table
21).
Table
161. The Divisor Latch Access
© NXP B.V. 2011. All rights reserved.
Table
User manual
24) and the
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