OM13008,598 NXP Semiconductors, OM13008,598 Datasheet - Page 288

• Manufacturer Part Number: OM13008,598
• Description: BOARD LPC XPRESSO LPC122X
• Manufacturer: NXP Semiconductors
• Series: LPCXpressor

Specifications of OM13008,598

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-6642; OM13008

18.1 How to read this chapter
18.2 Basic configuration
18.3 Features
18.4 General description
UM10441
User manual
The comparator is available on all LPC122x parts.
The peripheral clock to the comparator block is provided by the system clock, which is
controlled by the SYSAHBCLKDIV register
disabled through the System AHB clock control register bit 20
PDRUNCFG register bit 15
Remark: The BOD must be enabled in the PDRUNCFG register
the comparator. If the comparator is used to wake up the part from Deep-sleep mode, the
BOD and the comparator must be powered in the PDSLEEPCFG register by overwriting
the recommended settings for this register.
Two embedded comparators are incorporated on-chip to compare the voltage levels on
external pins or against internal voltages. Up to six voltages on external pins and two
internal reference voltages are selectable on each comparator. Additionally, four of the
external input voltages can be selected to drive an input common on both comparators in
case identical voltages are required on both comparators (see
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UM10441
Chapter 18: LPC122x Comparator
Rev. 1.1 — 10 March 2011
Up to six selectable external sources per comparator; fully configurable on either
positive or negative comparator input channels.
BOD 0.9 V internal reference voltage selectable on both comparators; configurable on
either positive or negative comparator input channels.
32-stage voltage ladder internal reference voltage selectable on both comparators;
configurable on either positive or negative comparator input channels.
Voltage ladder source voltage is selectable from an external pin or the 3.3 V voltage
rail if the external power source is not available.
Voltage ladder can be separately powered down for applications only requiring the
comparator function.
Relaxation oscillator circuitry output, for a feedback 555 style timer application.
Individual comparator interrupts connected to I/O pins, common interrupt connected
to NVIC.
Edge and level comparator outputs connect to two timers allowing edge tick counting
while a level match has been asserted.
All information provided in this document is subject to legal disclaimers.
Rev. 1.1 — 10 March 2011
(Table
50) for power savings.
(Table
21). The comparator block can be
(Table
Figure
(Table
21) and the
50).
50) in order to use
© NXP B.V. 2011. All rights reserved.
User manual
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