OM13008,598 NXP Semiconductors, OM13008,598 Datasheet - Page 156

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OM13008,598

Manufacturer Part Number
OM13008,598
Description
BOARD LPC XPRESSO LPC122X
Manufacturer
NXP Semiconductors
Series
LPCXpressor
Datasheets

Specifications of OM13008,598

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-6642
OM13008
NXP Semiconductors
UM10441
User manual
9.5.16 UART RS-485 Address Match register
9.5.17 UART1 RS-485 Delay value register
Table 156. UART RS485 Control register (RS485CTRL - address 0x4000 804C) bit description
The RS485ADRMATCH register contains the address match value for RS-485/EIA-485
mode.
Table 157. UART RS-485 Address Match register (RS485ADRMATCH - address 0x4000 8050)
The user may program the 8-bit RS485DLY register with a delay between the last stop bit
leaving the TXFIFO and the de-assertion of RTS (or DTR). This delay time is in periods of
the baud clock. Any delay time from 0 to 255 bit times may be programmed.
Table 158. UART RS-485 Delay value register (RS485DLY - address 0x4000 8054) bit
Bit
3
4
5
31:6 -
Bit
7:0
31:8
Bit
7:0
31:8
Symbol
SEL
DCTRL
OINV
Symbol
DLY
-
Symbol
ADRMATCH
-
…continued
bit description
description
All information provided in this document is subject to legal disclaimers.
Description
Contains the direction control (RTS or DTR) delay value. This
register works in conjunction with an 8-bit counter.
Reserved, user software should not write ones to reserved bits.
The value read from a reserved bit is not defined.
Value
0
1
0
1
0
1
-
Rev. 1.1 — 10 March 2011
Description
Contains the address match value.
Reserved
Description
Select direction control pin
If direction control is enabled (bit DCTRL = 1), pin
RTS is used for direction control.
If direction control is enabled (bit DCTRL = 1), pin
DTR is used for direction control.
Auto direction control enable.
Disable Auto Direction Control.
Enable Auto Direction Control.
Polarity control. This bit reverses the polarity of
the direction control signal on the RTS (or DTR)
pin.
The direction control pin will be driven to logic 0
when the transmitter has data to be sent. It will be
driven to logic 1 after the last bit of data has been
transmitted.
The direction control pin will be driven to logic 1
when the transmitter has data to be sent. It will be
driven to logic 0 after the last bit of data has been
transmitted.
Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit
is not defined.
Chapter 9: LPC122x UART0 with modem control
UM10441
© NXP B.V. 2011. All rights reserved.
Reset value
0x00
-
Reset value
0x00
NA
Reset
value
0
0
0
NA
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