OM13008,598 NXP Semiconductors, OM13008,598 Datasheet - Page 300

• Manufacturer Part Number: OM13008,598
• Description: BOARD LPC XPRESSO LPC122X
• Manufacturer: NXP Semiconductors
• Series: LPCXpressor

Specifications of OM13008,598

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-6642; OM13008

NXP Semiconductors
19.7 Operation
UM10441
User manual
19.7.1 Hardware-triggered conversion
19.7.2 Interrupts
19.7.3 DMA control
Once an ADC conversion is started, it cannot be interrupted. A new software write to
launch a new conversion or a new edge-trigger event will be ignored while the previous
conversion is in progress.
If the BURST bit in the ADCR is 0 and the START field contains 010-111, the ADC will
start a conversion when a transition occurs on a selected pin or Timer Match signal. The
choices include conversion on a specified edge of any of 4 Match signals, or conversion
on a specified edge of either of 2 Capture/Match pins. The pin state from the selected pad
or the selected Match signal, XORed with ADCR bit 27, is used in the edge detection
logic.
An interrupt request is asserted to the NVIC when the DONE bit is 1. Software can use the
Interrupt Enable bit for the A/D Converter in the NVIC to control whether this assertion
results in an interrupt. DONE is negated when the ADDR is read.
A DMA transfer request is generated from the ADC interrupt request line. To generate a
DMA transfer, the same conditions must be met as the conditions for generating an
interrupt (see
Remark: If the DMA is used, the ADC interrupt must be disabled in the NVIC.
For DMA transfers, the transfer size can be set to one in the DMA channel control
structure (see
transfer size determines when a DMA interrupt is generated.
Section 19.6.3
Table
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345) or to the number of ADC channels that are converted. The DMA
Rev. 1.1 — 10 March 2011
and
Section
19.7.2).
Chapter 19: LPC122x ADC
UM10441
© NXP B.V. 2011. All rights reserved.
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