OM13008,598 NXP Semiconductors, OM13008,598 Datasheet - Page 30

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OM13008,598

Manufacturer Part Number
OM13008,598
Description
BOARD LPC XPRESSO LPC122X
Manufacturer
NXP Semiconductors
Series
LPCXpressor
Datasheets

Specifications of OM13008,598

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-6642
OM13008
NXP Semiconductors
UM10441
User manual
4.5.30 Start logic edge control register 0
Table 36.
The STARTAPRP0 register controls the start logic inputs of ports 0 (PIO0_0 to PIO0_11).
This register selects a falling or rising edge on the corresponding PIO input to produce a
falling or rising clock edge, respectively, for the start logic (see
Every bit in the STARTAPRP0 register controls one port input and is connected to one
wake-up interrupt in the NVIC. Bit 0 in the STARTAPRP0 register corresponds to interrupt
0, bit 1 to interrupt 1, ... , up to a total of 12 interrupts. Through this start logic register set,
external pins can be used to wake up the microcontroller from Deep-sleep mode.
Remark: Each interrupt connected to a start logic input must be enabled in the NVIC if the
corresponding PIO pin is used to wake up the microcontroller from Deep-sleep mode.
Table 37.
Bit
5:0
31:6
Bit
0
1
2
Symbol
APRPIO0_0
APRPIO0_1
APRPIO0_2
Symbol
NMISRC
-
NMI interrupt source configuration register (INTNMI, address 0x4004 8174) bit
description
Start logic edge control register 0 (STARTAPRP0, address 0x4004 8200) bit
description
All information provided in this document is subject to legal disclaimers.
Description
NMI interrupt source select. Values 0x13 to 0x3E are reserved.
0x0 = I2C interrupt.
0x1 = CT16B0 interrupt.
0x2 = CT16B1 interrupt.
0x3 = CT32B0 interrupt.
0x4 = CT32B1 interrupt.
0x5 = SSP interrupt.
0x6 = UART0 interrupt.
0x7 = UART1 interrupt.
0x8 = Comparator interrupt.
0x9 = ADC interrupt.
0xA = Watchdog timer interrupt.
0xB = I2C interrupt.
0xC = Reserved.
0xD = PIO0 interrupt.
0xE = PIO1 interrupt.
0xF = PIO2 interrupt.
0x10 = PMU wake-up interrupt.
0x11 = DMA interrupt.
0x12 = RTC interrupt.
0x3F = NMI disabled.
Reserved
Description
Edge select for start logic input n for pin PIO0_0.
0 = Falling edge
1 = Rising edge
Edge select for start logic input n for pin PIO0_1.
0 = Falling edge
1 = Rising edge
Edge select for start logic input n for pin PIO0_2.
0 = Falling edge
1 = Rising edge
Rev. 1.1 — 10 March 2011
Chapter 4: LPC122x System control (SYSCON)
Section
UM10441
4.8.2).
© NXP B.V. 2011. All rights reserved.
Reset
value
0
Reset
value
-
0x00
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