OM13008,598 NXP Semiconductors, OM13008,598 Datasheet - Page 225

• Manufacturer Part Number: OM13008,598
• Description: BOARD LPC XPRESSO LPC122X
• Manufacturer: NXP Semiconductors
• Series: LPCXpressor

Specifications of OM13008,598

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-6642; OM13008

NXP Semiconductors
Table 205. Register overview: SSP (base address 0x4004 0000)
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UM10441
User manual
Name
CR0
CR1
DR
SR
CPSR
IMSC
RIS
MIS
ICR
DMACR
Reset value reflects the data stored in used bits only. It does not include reserved bits content.
12.6.1 SSP Control Register 0
Access Address
R/W
R/W
R/W
RO
R/W
R/W
RO
RO
WO
R/W
This register controls the basic operation of the SSP controller.
Table 206. SSP Control Register 0 (CR0 - address 0x4004 0000) bit description
Bit
3:0
5:4
offset
0x000
0x004
0x008
0x00C
0x010
0x014
0x018
0x01C
0x020
0x024
Symbol Value
DSS
FRF
Description
Control Register 0. Selects the serial clock rate, bus type, and data size. 0
Control Register 1. Selects master/slave and other modes.
Data Register. Writes fill the transmit FIFO, and reads empty the receive
FIFO.
Status Register
Clock Prescale Register
Interrupt Mask Set and Clear Register
Raw Interrupt Status Register
Masked Interrupt Status Register
SSPICR Interrupt Clear Register
DMA Control Register
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0x3
0x4
0x5
0x6
0x7
0x8
0x9
0xA
0xB
0xC
0xD
0xE
0xF
0x0
0x1
0x2
0x3
Rev. 1.1 — 10 March 2011
Description
Data Size Select. This field controls the number of bits
transferred in each frame. Values 0000-0010 are not
supported and should not be used.
4-bit transfer
5-bit transfer
6-bit transfer
7-bit transfer
8-bit transfer
9-bit transfer
10-bit transfer
11-bit transfer
12-bit transfer
13-bit transfer
14-bit transfer
15-bit transfer
16-bit transfer
Frame Format.
SPI
TI
Microwire
This combination is not supported and should not be used.
Chapter 12: LPC122x SSP controller
UM10441
© NXP B.V. 2011. All rights reserved.
Reset
value
0
0
0x0000
0003
0
0
-
0x0000
0008
NA
0
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Reset
value
0000
00
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