OM13008,598 NXP Semiconductors, OM13008,598 Datasheet - Page 429

• Manufacturer Part Number: OM13008,598
• Description: BOARD LPC XPRESSO LPC122X
• Manufacturer: NXP Semiconductors
• Series: LPCXpressor

Specifications of OM13008,598

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-6642; OM13008

NXP Semiconductors
Table 215. SSP DMA Control Register (DMACR - address
Table 216. Counter/timer pin description . . . . . . . . . . . . .239
Table 217. Comparator connections to the 16-bit
Table 218. Register overview: 16-bit counter/timer 0 CT16B0
Table 219. Register overview: 16-bit counter/timer 1 CT16B1
Table 220. Interrupt Register (IR, address 0x4001 0000
Table 221. Timer Control Register (TCR, address 0x4001
Table 222: Timer counter registers (TC, address
Table 223: Prescale registers (PR, address 0x4001 000C
Table 224: Prescale counter registers (PC, address
Table 225. Match Control Register (MCR, address 0x4001
Table 226: Match registers (MR0 to 3, addresses
Table 227. Capture Control Register (CCR, address 0x4001
Table 228: Capture registers (CR0 to 3, addresses
Table 229. External Match Register (EMR, address 0x4001
Table 230. External match control . . . . . . . . . . . . . . . . . .248
Table 231. Count Control Register (CTCR, address 0x4001
Table 232. PWM Control Register (PWMC, address 0x4001
Table 233. Counter/timer pin description . . . . . . . . . . . . .255
Table 234. Register overview: 32-bit counter/timer 0 CT32B0
Table 235. Register overview: 32-bit counter/timer 1 CT32B1
Table 236: Interrupt Register (IR, address 0x4001 8000
Table 237: Timer Control Register (TCR, address
UM10441
User manual
0x4004 0020) bit description . . . . . . . . . . . . .230
0x4004 0024) bit description . . . . . . . . . . . . .230
counter/timer. . . . . . . . . . . . . . . . . . . . . . . . . .239
(base address 0x4001 0000) . . . . . . . . . . . .240
(base address 0x4001 4000) . . . . . . . . . . . .241
(CT16B0) and 0x4001 4000 (CT16B1)) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .242
description . . . . . . . . . . . . . . . . . . . . . . . . . . .242
0x4001 0008 (CT16B0) and 0x4001 4008
(CT16B1)) bit description . . . . . . . . . . . . . . . .243
(CT16B0) and 0x4001 400C (CT16B1)) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .243
0x4001 0010 (CT16B0) and 0x4001 4010
(CT16B1)) bit description . . . . . . . . . . . . . . . .243
description
0x4001 0018 to 24 (CT16B0) and 0x4001 4018 to
24 (CT16B1)) bit description. . . . . . . . . . . . . .245
description . . . . . . . . . . . . . . . . . . . . . . . . . . .245
0x4001 002C to 38 (CT16B0) and 0x4001 402C
to 38 (CT16B1)) bit description. . . . . . . . . . . .247
description . . . . . . . . . . . . . . . . . . . . . . . . . . .247
description . . . . . . . . . . . . . . . . . . . . . . . . . . .249
250
(base address 0x4001 8000) . . . . . . . . . . . .255
(base address 0x4001 C000) . . . . . . . . . . . .256
(CT32B0) and IR, address 0x4001 C000) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .258
0x4001 8004 (CT32B0) and 0x4001 C004
(CT32B1)) bit description . . . . . . . . . . . . . . . .258
0004 (CT16B0) and 0x4001 4004 (CT16B1)) bit
0014 (CT16B0) and 0x4001 4014 (CT16B1)) bit
0028 (CT16B0) and 0x4001 4028 (CT16B1)) bit
003C (CT16B0) and 0x4001 403C (CT16B1)) bit
0070 (CT16B0) and 0x4001 4070 (CT16B1)) bit
0074 and 0x4001 4074 (CT16B1)) bit description
. . . . . . . . . . . . . . . . . . . . . . . . . .243
All information provided in this document is subject to legal disclaimers.
Rev. 1.1 — 10 March 2011
Table 238: Timer counter registers (TC, address
Table 239: Prescale registers (PR, address 0x4001 800C
Table 240: Prescale registers (PC, address 0x4001 8010
Table 241: Match Control Register (MCR, address
Table 242: Match registers (MR0 to 3, addresses
Table 243: Capture Control Register (CCR, address
Table 244: Capture registers (CR0 to 3, addresses
Table 245: External Match Register (EMR, address
Table 246. External match control . . . . . . . . . . . . . . . . . 264
Table 247: Count Control Register (CTCR, address
Table 248: PWM Control Register (PWMC, 0x4001 8074
Table 249. Register overview: SysTick timer (base address
Table 250. SysTick Timer Control and status register
Table 251. System Timer Reload value register (SYST_RVR
Table 252. System Timer Current value register (SYST_CVR
Table 253. System Timer Calibration value register
Table 254. Register overview: RTC (base address 0x4005
Table 255. RTC data register (DR - address 0x4005 0000) bit
Table 256. RTC match register (MR - address 0x4005 0004)
Table 257. RTC load register (LR - address 0x4005 0008) bit
Table 258. RTC control register (CR - address 0x4005 000C)
Table 259. RTC interrupt mask register (ICSC - address
Table 260. RTC interrupt status register (RIS - address
Table 261. RTC masked interrupt status register (MIS -
0x4001 8008 (CT32B0) and 0x4001 5C008
(CT32B1)) bit description . . . . . . . . . . . . . . . . 258
(CT32B0) and 0x4001 5C00C (CT32B1)) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . 259
(CT32B0) and 0x4001 5C010 (CT32B1)) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . 259
0x4001 8014 (CT32B0) and 0x4001 C014
(CT32B1)) bit description . . . . . . . . . . . . . . . . 259
0x4001 8018 to 24 (CT32B0) and 0x4001 C018 to
24 (CT32B1)) bit description . . . . . . . . . . . . . 260
0x4001 8028 (CT32B0) and 0x4001 C028
(CT32B1)) bit description . . . . . . . . . . . . . . . . 261
0x4001 802C to 38 (CT32B0) and 0x4001 C02C
to 38 (CT32B1)) bit description . . . . . . . . . . . 262
0x4001 803C (CT32B0) and 0x4001 C03C
(CT32B1)) bit description . . . . . . . . . . . . . . . . 263
0x4001 8070 (CT32B0) and 0x4001 C070
(CT32B1)) bit description . . . . . . . . . . . . . . . 265
(CT32B0) and 0x4001 C074 (CT32B1)) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . 266
0xE000 E000) . . . . . . . . . . . . . . . . . . . . . . . . 271
(SYST_CSR - 0xE000 E010) bit description . 271
- 0xE000 E014) bit description. . . . . . . . . . . . 272
- 0xE000 E018) bit description. . . . . . . . . . . . 272
(SYST_CALIB - 0xE000 E01C) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . 273
0000) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 275
description . . . . . . . . . . . . . . . . . . . . . . . . . . . 275
bit description. . . . . . . . . . . . . . . . . . . . . . . . . 275
description . . . . . . . . . . . . . . . . . . . . . . . . . . . 275
bit description. . . . . . . . . . . . . . . . . . . . . . . . . 276
0x4005 0010) bit description . . . . . . . . . . . . . 276
0x4005 0014) bit description . . . . . . . . . . . . . 276
address 0x4005 0018) bit description . . . . . . 276
Chapter 26: Supplementary information
UM10441
© NXP B.V. 2011. All rights reserved.
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